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# bsp_sd: smoke test

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This commit is contained in:
Dmitry Akimov 2026-05-06 16:12:10 +03:00
parent 3ec4aad771
commit 8a58b052b1
16 changed files with 582 additions and 414 deletions
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29
bsp/generated/TFT_Board.mex
View file

@ -287,12 +287,12 @@
<data>true</data> <data>true</data>
</feature> </feature>
</dependency> </dependency>
<dependency resourceType="Peripheral" resourceId="CMP1" description="Peripheral CMP1 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitRS_UART_deinit"> <dependency resourceType="Peripheral" resourceId="ADC1" description="Peripheral ADC1 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitRS_UART_deinit">
<feature name="initialized" evaluation="equal"> <feature name="initialized" evaluation="equal">
<data>true</data> <data>true</data>
</feature> </feature>
</dependency> </dependency>
<dependency resourceType="Peripheral" resourceId="ADC1" description="Peripheral ADC1 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitRS_UART_deinit"> <dependency resourceType="Peripheral" resourceId="CMP1" description="Peripheral CMP1 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitRS_UART_deinit">
<feature name="initialized" evaluation="equal"> <feature name="initialized" evaluation="equal">
<data>true</data> <data>true</data>
</feature> </feature>
@ -351,12 +351,12 @@
<data>true</data> <data>true</data>
</feature> </feature>
</dependency> </dependency>
<dependency resourceType="Peripheral" resourceId="CMP1" description="Peripheral CMP1 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitRS_GPIO_deinit"> <dependency resourceType="Peripheral" resourceId="ADC1" description="Peripheral ADC1 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitRS_GPIO_deinit">
<feature name="initialized" evaluation="equal"> <feature name="initialized" evaluation="equal">
<data>true</data> <data>true</data>
</feature> </feature>
</dependency> </dependency>
<dependency resourceType="Peripheral" resourceId="ADC1" description="Peripheral ADC1 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitRS_GPIO_deinit"> <dependency resourceType="Peripheral" resourceId="CMP1" description="Peripheral CMP1 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitRS_GPIO_deinit">
<feature name="initialized" evaluation="equal"> <feature name="initialized" evaluation="equal">
<data>true</data> <data>true</data>
</feature> </feature>
@ -488,7 +488,7 @@
<clock_output id="IPG_CLK_ROOT.outFreq" value="150 MHz" locked="false" accuracy=""/> <clock_output id="IPG_CLK_ROOT.outFreq" value="150 MHz" locked="false" accuracy=""/>
<clock_output id="LCDIF_CLK_ROOT.outFreq" value="3 MHz" locked="false" accuracy=""/> <clock_output id="LCDIF_CLK_ROOT.outFreq" value="3 MHz" locked="false" accuracy=""/>
<clock_output id="LPI2C_CLK_ROOT.outFreq" value="60 MHz" locked="false" accuracy=""/> <clock_output id="LPI2C_CLK_ROOT.outFreq" value="60 MHz" locked="false" accuracy=""/>
<clock_output id="LPSPI_CLK_ROOT.outFreq" value="6 MHz" locked="false" accuracy=""/> <clock_output id="LPSPI_CLK_ROOT.outFreq" value="105.6 MHz" locked="false" accuracy=""/>
<clock_output id="LVDS1_CLK.outFreq" value="1.2 GHz" locked="false" accuracy=""/> <clock_output id="LVDS1_CLK.outFreq" value="1.2 GHz" locked="false" accuracy=""/>
<clock_output id="MQS_MCLK.outFreq" value="1080/17 MHz" locked="false" accuracy=""/> <clock_output id="MQS_MCLK.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
<clock_output id="PERCLK_CLK_ROOT.outFreq" value="75 MHz" locked="false" accuracy=""/> <clock_output id="PERCLK_CLK_ROOT.outFreq" value="75 MHz" locked="false" accuracy=""/>
@ -505,23 +505,36 @@
<clock_output id="SAI3_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/> <clock_output id="SAI3_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
<clock_output id="SEMC_CLK_ROOT.outFreq" value="120 MHz" locked="false" accuracy=""/> <clock_output id="SEMC_CLK_ROOT.outFreq" value="120 MHz" locked="false" accuracy=""/>
<clock_output id="SPDIF0_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/> <clock_output id="SPDIF0_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
<clock_output id="TRACE_CLK_ROOT.outFreq" value="6 MHz" locked="false" accuracy=""/> <clock_output id="TRACE_CLK_ROOT.outFreq" value="99 MHz" locked="false" accuracy=""/>
<clock_output id="UART_CLK_ROOT.outFreq" value="80 MHz" locked="false" accuracy=""/> <clock_output id="UART_CLK_ROOT.outFreq" value="80 MHz" locked="false" accuracy=""/>
<clock_output id="USBPHY1_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/> <clock_output id="USBPHY1_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/>
<clock_output id="USDHC1_CLK_ROOT.outFreq" value="12 MHz" locked="false" accuracy=""/> <clock_output id="USDHC1_CLK_ROOT.outFreq" value="198 MHz" locked="false" accuracy=""/>
<clock_output id="USDHC2_CLK_ROOT.outFreq" value="12 MHz" locked="false" accuracy=""/> <clock_output id="USDHC2_CLK_ROOT.outFreq" value="79.2 MHz" locked="false" accuracy=""/>
</clock_outputs> </clock_outputs>
<clock_settings> <clock_settings>
<setting id="CCM.AHB_PODF.scale" value="1" locked="true"/> <setting id="CCM.AHB_PODF.scale" value="1" locked="true"/>
<setting id="CCM.ARM_PODF.scale" value="2" locked="true"/> <setting id="CCM.ARM_PODF.scale" value="2" locked="true"/>
<setting id="CCM.CAN_CLK_PODF.scale" value="1" locked="true"/> <setting id="CCM.CAN_CLK_PODF.scale" value="1" locked="true"/>
<setting id="CCM.LCDIF_PRE_CLK_SEL.sel" value="CCM_ANALOG.PLL5_MAIN_CLK" locked="false"/> <setting id="CCM.LCDIF_PRE_CLK_SEL.sel" value="CCM_ANALOG.PLL5_MAIN_CLK" locked="false"/>
<setting id="CCM.LPSPI_PODF.scale" value="5" locked="false"/>
<setting id="CCM.PERCLK_PODF.scale" value="2" locked="true"/> <setting id="CCM.PERCLK_PODF.scale" value="2" locked="true"/>
<setting id="CCM.PERIPH_CLK2_SEL.sel" value="XTALOSC24M.OSC_CLK" locked="false"/> <setting id="CCM.PERIPH_CLK2_SEL.sel" value="XTALOSC24M.OSC_CLK" locked="false"/>
<setting id="CCM.SEMC_PODF.scale" value="5" locked="true"/> <setting id="CCM.SEMC_PODF.scale" value="5" locked="true"/>
<setting id="CCM.USDHC1_CLK_SEL.sel" value="CCM_ANALOG.PLL2_PFD0_CLK" locked="false"/>
<setting id="CCM.USDHC1_PODF.scale" value="2" locked="true"/>
<setting id="CCM.USDHC2_PODF.scale" value="5" locked="false"/>
<setting id="CCM_ANALOG.PLL1_BYPASS.sel" value="CCM_ANALOG.PLL1" locked="false"/> <setting id="CCM_ANALOG.PLL1_BYPASS.sel" value="CCM_ANALOG.PLL1" locked="false"/>
<setting id="CCM_ANALOG.PLL1_PREDIV.scale" value="1" locked="true"/> <setting id="CCM_ANALOG.PLL1_PREDIV.scale" value="1" locked="true"/>
<setting id="CCM_ANALOG.PLL1_VDIV.scale" value="50" locked="true"/> <setting id="CCM_ANALOG.PLL1_VDIV.scale" value="50" locked="true"/>
<setting id="CCM_ANALOG.PLL2.denom" value="1" locked="false"/>
<setting id="CCM_ANALOG.PLL2.num" value="0" locked="false"/>
<setting id="CCM_ANALOG.PLL2_BYPASS.sel" value="CCM_ANALOG.PLL2_OUT_CLK" locked="false"/>
<setting id="CCM_ANALOG.PLL2_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD0" locked="false"/>
<setting id="CCM_ANALOG.PLL2_PFD0_DIV.scale" value="24" locked="true"/>
<setting id="CCM_ANALOG.PLL2_PFD0_MUL.scale" value="18" locked="true"/>
<setting id="CCM_ANALOG.PLL2_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD1" locked="false"/>
<setting id="CCM_ANALOG.PLL2_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD2" locked="false"/>
<setting id="CCM_ANALOG.PLL2_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD3" locked="false"/>
<setting id="CCM_ANALOG.PLL3_BYPASS.sel" value="CCM_ANALOG.PLL3" locked="false"/> <setting id="CCM_ANALOG.PLL3_BYPASS.sel" value="CCM_ANALOG.PLL3" locked="false"/>
<setting id="CCM_ANALOG.PLL3_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD0" locked="false"/> <setting id="CCM_ANALOG.PLL3_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD0" locked="false"/>
<setting id="CCM_ANALOG.PLL3_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD1" locked="false"/> <setting id="CCM_ANALOG.PLL3_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD1" locked="false"/>

11
bsp/generated/board.c
View file

@ -97,9 +97,18 @@ static void board_mpu_init(void)
SCB_EnableICache(); SCB_EnableICache();
} }
static void board_dwt_init(void)
{
/* DWT cycle counter — нужен для точного SDK_DelayAtLeastUs.
* Без этого SDK использует software loop с непредсказуемым timing. */
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
DWT->CYCCNT = 0U;
DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
}
void board_hw_init(void) void board_hw_init(void)
{ {
board_dwt_init();
BOARD_InitPins(); BOARD_InitPins();
BOARD_BootClockRUN(); BOARD_BootClockRUN();
board_mpu_init(); board_mpu_init();

35
bsp/generated/board/clock_config.c
View file

@ -72,7 +72,7 @@ outputs:
- {id: IPG_CLK_ROOT.outFreq, value: 150 MHz} - {id: IPG_CLK_ROOT.outFreq, value: 150 MHz}
- {id: LCDIF_CLK_ROOT.outFreq, value: 3 MHz} - {id: LCDIF_CLK_ROOT.outFreq, value: 3 MHz}
- {id: LPI2C_CLK_ROOT.outFreq, value: 60 MHz} - {id: LPI2C_CLK_ROOT.outFreq, value: 60 MHz}
- {id: LPSPI_CLK_ROOT.outFreq, value: 6 MHz} - {id: LPSPI_CLK_ROOT.outFreq, value: 105.6 MHz}
- {id: LVDS1_CLK.outFreq, value: 1.2 GHz} - {id: LVDS1_CLK.outFreq, value: 1.2 GHz}
- {id: MQS_MCLK.outFreq, value: 1080/17 MHz} - {id: MQS_MCLK.outFreq, value: 1080/17 MHz}
- {id: PERCLK_CLK_ROOT.outFreq, value: 75 MHz} - {id: PERCLK_CLK_ROOT.outFreq, value: 75 MHz}
@ -89,22 +89,35 @@ outputs:
- {id: SAI3_MCLK3.outFreq, value: 30 MHz} - {id: SAI3_MCLK3.outFreq, value: 30 MHz}
- {id: SEMC_CLK_ROOT.outFreq, value: 120 MHz} - {id: SEMC_CLK_ROOT.outFreq, value: 120 MHz}
- {id: SPDIF0_CLK_ROOT.outFreq, value: 30 MHz} - {id: SPDIF0_CLK_ROOT.outFreq, value: 30 MHz}
- {id: TRACE_CLK_ROOT.outFreq, value: 6 MHz} - {id: TRACE_CLK_ROOT.outFreq, value: 99 MHz}
- {id: UART_CLK_ROOT.outFreq, value: 80 MHz} - {id: UART_CLK_ROOT.outFreq, value: 80 MHz}
- {id: USBPHY1_CLK.outFreq, value: 480 MHz} - {id: USBPHY1_CLK.outFreq, value: 480 MHz}
- {id: USDHC1_CLK_ROOT.outFreq, value: 12 MHz} - {id: USDHC1_CLK_ROOT.outFreq, value: 198 MHz}
- {id: USDHC2_CLK_ROOT.outFreq, value: 12 MHz} - {id: USDHC2_CLK_ROOT.outFreq, value: 79.2 MHz}
settings: settings:
- {id: CCM.AHB_PODF.scale, value: '1', locked: true} - {id: CCM.AHB_PODF.scale, value: '1', locked: true}
- {id: CCM.ARM_PODF.scale, value: '2', locked: true} - {id: CCM.ARM_PODF.scale, value: '2', locked: true}
- {id: CCM.CAN_CLK_PODF.scale, value: '1', locked: true} - {id: CCM.CAN_CLK_PODF.scale, value: '1', locked: true}
- {id: CCM.LCDIF_PRE_CLK_SEL.sel, value: CCM_ANALOG.PLL5_MAIN_CLK} - {id: CCM.LCDIF_PRE_CLK_SEL.sel, value: CCM_ANALOG.PLL5_MAIN_CLK}
- {id: CCM.LPSPI_PODF.scale, value: '5'}
- {id: CCM.PERCLK_PODF.scale, value: '2', locked: true} - {id: CCM.PERCLK_PODF.scale, value: '2', locked: true}
- {id: CCM.PERIPH_CLK2_SEL.sel, value: XTALOSC24M.OSC_CLK} - {id: CCM.PERIPH_CLK2_SEL.sel, value: XTALOSC24M.OSC_CLK}
- {id: CCM.SEMC_PODF.scale, value: '5', locked: true} - {id: CCM.SEMC_PODF.scale, value: '5', locked: true}
- {id: CCM.USDHC1_CLK_SEL.sel, value: CCM_ANALOG.PLL2_PFD0_CLK}
- {id: CCM.USDHC1_PODF.scale, value: '2', locked: true}
- {id: CCM.USDHC2_PODF.scale, value: '5'}
- {id: CCM_ANALOG.PLL1_BYPASS.sel, value: CCM_ANALOG.PLL1} - {id: CCM_ANALOG.PLL1_BYPASS.sel, value: CCM_ANALOG.PLL1}
- {id: CCM_ANALOG.PLL1_PREDIV.scale, value: '1', locked: true} - {id: CCM_ANALOG.PLL1_PREDIV.scale, value: '1', locked: true}
- {id: CCM_ANALOG.PLL1_VDIV.scale, value: '50', locked: true} - {id: CCM_ANALOG.PLL1_VDIV.scale, value: '50', locked: true}
- {id: CCM_ANALOG.PLL2.denom, value: '1'}
- {id: CCM_ANALOG.PLL2.num, value: '0'}
- {id: CCM_ANALOG.PLL2_BYPASS.sel, value: CCM_ANALOG.PLL2_OUT_CLK}
- {id: CCM_ANALOG.PLL2_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD0}
- {id: CCM_ANALOG.PLL2_PFD0_DIV.scale, value: '24', locked: true}
- {id: CCM_ANALOG.PLL2_PFD0_MUL.scale, value: '18', locked: true}
- {id: CCM_ANALOG.PLL2_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD1}
- {id: CCM_ANALOG.PLL2_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD2}
- {id: CCM_ANALOG.PLL2_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD3}
- {id: CCM_ANALOG.PLL3_BYPASS.sel, value: CCM_ANALOG.PLL3} - {id: CCM_ANALOG.PLL3_BYPASS.sel, value: CCM_ANALOG.PLL3}
- {id: CCM_ANALOG.PLL3_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD0} - {id: CCM_ANALOG.PLL3_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD0}
- {id: CCM_ANALOG.PLL3_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD1} - {id: CCM_ANALOG.PLL3_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD1}
@ -128,8 +141,8 @@ const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN =
const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN = const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN =
{ {
.loopDivider = 1, /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */ .loopDivider = 1, /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */
.numerator = 1, /* 30 bit numerator of fractional loop divider */ .numerator = 0, /* 30 bit numerator of fractional loop divider */
.denominator = 60000, /* 30 bit denominator of fractional loop divider */ .denominator = 1, /* 30 bit denominator of fractional loop divider */
.src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
}; };
const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN = const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN =
@ -201,11 +214,11 @@ void BOARD_BootClockRUN(void)
/* Set USDHC1_PODF. */ /* Set USDHC1_PODF. */
CLOCK_SetDiv(kCLOCK_Usdhc1Div, 1); CLOCK_SetDiv(kCLOCK_Usdhc1Div, 1);
/* Set Usdhc1 clock source. */ /* Set Usdhc1 clock source. */
CLOCK_SetMux(kCLOCK_Usdhc1Mux, 0); CLOCK_SetMux(kCLOCK_Usdhc1Mux, 1);
/* Disable USDHC2 clock gate. */ /* Disable USDHC2 clock gate. */
CLOCK_DisableClock(kCLOCK_Usdhc2); CLOCK_DisableClock(kCLOCK_Usdhc2);
/* Set USDHC2_PODF. */ /* Set USDHC2_PODF. */
CLOCK_SetDiv(kCLOCK_Usdhc2Div, 1); CLOCK_SetDiv(kCLOCK_Usdhc2Div, 4);
/* Set Usdhc2 clock source. */ /* Set Usdhc2 clock source. */
CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0); CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0);
/* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd. /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
@ -244,7 +257,7 @@ void BOARD_BootClockRUN(void)
CLOCK_DisableClock(kCLOCK_Lpspi3); CLOCK_DisableClock(kCLOCK_Lpspi3);
CLOCK_DisableClock(kCLOCK_Lpspi4); CLOCK_DisableClock(kCLOCK_Lpspi4);
/* Set LPSPI_PODF. */ /* Set LPSPI_PODF. */
CLOCK_SetDiv(kCLOCK_LpspiDiv, 3); CLOCK_SetDiv(kCLOCK_LpspiDiv, 4);
/* Set Lpspi clock source. */ /* Set Lpspi clock source. */
CLOCK_SetMux(kCLOCK_LpspiMux, 2); CLOCK_SetMux(kCLOCK_LpspiMux, 2);
/* Disable TRACE clock gate. */ /* Disable TRACE clock gate. */
@ -353,15 +366,13 @@ void BOARD_BootClockRUN(void)
/* Init System PLL. */ /* Init System PLL. */
CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN); CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN);
/* Init System pfd0. */ /* Init System pfd0. */
CLOCK_InitSysPfd(kCLOCK_Pfd0, 27); CLOCK_InitSysPfd(kCLOCK_Pfd0, 24);
/* Init System pfd1. */ /* Init System pfd1. */
CLOCK_InitSysPfd(kCLOCK_Pfd1, 16); CLOCK_InitSysPfd(kCLOCK_Pfd1, 16);
/* Init System pfd2. */ /* Init System pfd2. */
CLOCK_InitSysPfd(kCLOCK_Pfd2, 24); CLOCK_InitSysPfd(kCLOCK_Pfd2, 24);
/* Init System pfd3. */ /* Init System pfd3. */
CLOCK_InitSysPfd(kCLOCK_Pfd3, 16); CLOCK_InitSysPfd(kCLOCK_Pfd3, 16);
/* Bypass System PLL. */
CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllSys, 1);
#endif #endif
/* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd. /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
* With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged. * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.

8
bsp/generated/board/clock_config.h
View file

@ -63,7 +63,7 @@ void BOARD_InitBootClocks(void);
#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT 150000000UL /* Clock consumers of IPG_CLK_ROOT output : ADC1, ADC2, ADC_ETC, AOI1, AOI2, ARM, BEE, CAN1, CAN2, CCM, CMP1, CMP2, CMP3, CMP4, CSI, CSU, DCDC, DCP, DMA0, DMAMUX, ENC1, ENC2, ENC3, ENC4, ENET, EWM, FLEXIO1, FLEXIO2, FLEXRAM, FLEXSPI, GPC, GPIO1, GPIO2, GPIO3, GPIO4, GPIO5, IOMUXC, KPP, LCDIF, LPI2C1, LPI2C2, LPI2C3, LPI2C4, LPSPI1, LPSPI2, LPSPI3, LPSPI4, LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8, OCOTP, PMU, PWM1, PWM2, PWM3, PWM4, PXP, ROMC, RTWDOG, SAI1, SAI2, SAI3, SNVS, SPDIF, SRC, TEMPMON, TMR1, TMR2, TMR3, TMR4, TRNG, TSC, USB1, USB2, USDHC1, USDHC2, WDOG1, WDOG2, XBARA1, XBARB2, XBARB3 */ #define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT 150000000UL /* Clock consumers of IPG_CLK_ROOT output : ADC1, ADC2, ADC_ETC, AOI1, AOI2, ARM, BEE, CAN1, CAN2, CCM, CMP1, CMP2, CMP3, CMP4, CSI, CSU, DCDC, DCP, DMA0, DMAMUX, ENC1, ENC2, ENC3, ENC4, ENET, EWM, FLEXIO1, FLEXIO2, FLEXRAM, FLEXSPI, GPC, GPIO1, GPIO2, GPIO3, GPIO4, GPIO5, IOMUXC, KPP, LCDIF, LPI2C1, LPI2C2, LPI2C3, LPI2C4, LPSPI1, LPSPI2, LPSPI3, LPSPI4, LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8, OCOTP, PMU, PWM1, PWM2, PWM3, PWM4, PXP, ROMC, RTWDOG, SAI1, SAI2, SAI3, SNVS, SPDIF, SRC, TEMPMON, TMR1, TMR2, TMR3, TMR4, TRNG, TSC, USB1, USB2, USDHC1, USDHC2, WDOG1, WDOG2, XBARA1, XBARB2, XBARB3 */
#define BOARD_BOOTCLOCKRUN_LCDIF_CLK_ROOT 3000000UL /* Clock consumers of LCDIF_CLK_ROOT output : LCDIF */ #define BOARD_BOOTCLOCKRUN_LCDIF_CLK_ROOT 3000000UL /* Clock consumers of LCDIF_CLK_ROOT output : LCDIF */
#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT 60000000UL /* Clock consumers of LPI2C_CLK_ROOT output : LPI2C1, LPI2C2, LPI2C3, LPI2C4 */ #define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT 60000000UL /* Clock consumers of LPI2C_CLK_ROOT output : LPI2C1, LPI2C2, LPI2C3, LPI2C4 */
#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT 6000000UL /* Clock consumers of LPSPI_CLK_ROOT output : LPSPI1, LPSPI2, LPSPI3, LPSPI4 */ #define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT 105600000UL /* Clock consumers of LPSPI_CLK_ROOT output : LPSPI1, LPSPI2, LPSPI3, LPSPI4 */
#define BOARD_BOOTCLOCKRUN_LVDS1_CLK 1200000000UL /* Clock consumers of LVDS1_CLK output : N/A */ #define BOARD_BOOTCLOCKRUN_LVDS1_CLK 1200000000UL /* Clock consumers of LVDS1_CLK output : N/A */
#define BOARD_BOOTCLOCKRUN_MQS_MCLK 63529411UL /* Clock consumers of MQS_MCLK output : N/A */ #define BOARD_BOOTCLOCKRUN_MQS_MCLK 63529411UL /* Clock consumers of MQS_MCLK output : N/A */
#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT 75000000UL /* Clock consumers of PERCLK_CLK_ROOT output : GPT1, GPT2, PIT */ #define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT 75000000UL /* Clock consumers of PERCLK_CLK_ROOT output : GPT1, GPT2, PIT */
@ -83,12 +83,12 @@ void BOARD_InitBootClocks(void);
#define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT 120000000UL /* Clock consumers of SEMC_CLK_ROOT output : SEMC */ #define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT 120000000UL /* Clock consumers of SEMC_CLK_ROOT output : SEMC */
#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL /* Clock consumers of SPDIF0_CLK_ROOT output : SPDIF */ #define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL /* Clock consumers of SPDIF0_CLK_ROOT output : SPDIF */
#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL /* Clock consumers of SPDIF0_EXTCLK_OUT output : SPDIF */ #define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL /* Clock consumers of SPDIF0_EXTCLK_OUT output : SPDIF */
#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 6000000UL /* Clock consumers of TRACE_CLK_ROOT output : ARM */ #define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 99000000UL /* Clock consumers of TRACE_CLK_ROOT output : ARM */
#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL /* Clock consumers of UART_CLK_ROOT output : LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8 */ #define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL /* Clock consumers of UART_CLK_ROOT output : LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8 */
#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 480000000UL /* Clock consumers of USBPHY1_CLK output : TEMPMON, USB1 */ #define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 480000000UL /* Clock consumers of USBPHY1_CLK output : TEMPMON, USB1 */
#define BOARD_BOOTCLOCKRUN_USBPHY2_CLK 0UL /* Clock consumers of USBPHY2_CLK output : USB2 */ #define BOARD_BOOTCLOCKRUN_USBPHY2_CLK 0UL /* Clock consumers of USBPHY2_CLK output : USB2 */
#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 12000000UL /* Clock consumers of USDHC1_CLK_ROOT output : USDHC1 */ #define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 198000000UL /* Clock consumers of USDHC1_CLK_ROOT output : USDHC1 */
#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT 12000000UL /* Clock consumers of USDHC2_CLK_ROOT output : USDHC2 */ #define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT 79200000UL /* Clock consumers of USDHC2_CLK_ROOT output : USDHC2 */
/*! @brief Arm PLL set for BOARD_BootClockRUN configuration. /*! @brief Arm PLL set for BOARD_BootClockRUN configuration.
*/ */

24
bsp/generated/board/pin_mux.h
View file

@ -267,16 +267,16 @@ void BOARD_InitRS_UART(void);
/* GPIO_AD_B1_07 (coord K10), RsRx */ /* GPIO_AD_B1_07 (coord K10), RsRx */
/* Routed pin properties */ /* Routed pin properties */
#define BOARD_INITRS_UART_DEINIT_RsRx_PERIPHERAL CMP1 /*!< Peripheral name */
#define BOARD_INITRS_UART_DEINIT_RsRx_SIGNAL IN /*!< Signal name */
#define BOARD_INITRS_UART_DEINIT_RsRx_CHANNEL 5U /*!< Signal channel */
/* GPIO_AD_B1_07 (coord K10) */
/* Routed pin properties */
#define BOARD_INITRS_UART_DEINIT_RsRx_PERIPHERAL ADC1 /*!< Peripheral name */ #define BOARD_INITRS_UART_DEINIT_RsRx_PERIPHERAL ADC1 /*!< Peripheral name */
#define BOARD_INITRS_UART_DEINIT_RsRx_SIGNAL IN /*!< Signal name */ #define BOARD_INITRS_UART_DEINIT_RsRx_SIGNAL IN /*!< Signal name */
#define BOARD_INITRS_UART_DEINIT_RsRx_CHANNEL 12U /*!< Signal channel */ #define BOARD_INITRS_UART_DEINIT_RsRx_CHANNEL 12U /*!< Signal channel */
/* GPIO_AD_B1_07 (coord K10) */
/* Routed pin properties */
#define BOARD_INITRS_UART_DEINIT_RsRx_PERIPHERAL CMP1 /*!< Peripheral name */
#define BOARD_INITRS_UART_DEINIT_RsRx_SIGNAL IN /*!< Signal name */
#define BOARD_INITRS_UART_DEINIT_RsRx_CHANNEL 5U /*!< Signal channel */
/*! /*!
* @brief This is a de-initialization function for 'BOARD_InitRS_UART' function. * @brief This is a de-initialization function for 'BOARD_InitRS_UART' function.
@ -329,16 +329,16 @@ void BOARD_InitRS_GPIO(void);
/* GPIO_AD_B1_07 (coord K10), RsRx */ /* GPIO_AD_B1_07 (coord K10), RsRx */
/* Routed pin properties */ /* Routed pin properties */
#define BOARD_INITRS_GPIO_DEINIT_RsRx_PERIPHERAL CMP1 /*!< Peripheral name */
#define BOARD_INITRS_GPIO_DEINIT_RsRx_SIGNAL IN /*!< Signal name */
#define BOARD_INITRS_GPIO_DEINIT_RsRx_CHANNEL 5U /*!< Signal channel */
/* GPIO_AD_B1_07 (coord K10) */
/* Routed pin properties */
#define BOARD_INITRS_GPIO_DEINIT_RsRx_PERIPHERAL ADC1 /*!< Peripheral name */ #define BOARD_INITRS_GPIO_DEINIT_RsRx_PERIPHERAL ADC1 /*!< Peripheral name */
#define BOARD_INITRS_GPIO_DEINIT_RsRx_SIGNAL IN /*!< Signal name */ #define BOARD_INITRS_GPIO_DEINIT_RsRx_SIGNAL IN /*!< Signal name */
#define BOARD_INITRS_GPIO_DEINIT_RsRx_CHANNEL 12U /*!< Signal channel */ #define BOARD_INITRS_GPIO_DEINIT_RsRx_CHANNEL 12U /*!< Signal channel */
/* GPIO_AD_B1_07 (coord K10) */
/* Routed pin properties */
#define BOARD_INITRS_GPIO_DEINIT_RsRx_PERIPHERAL CMP1 /*!< Peripheral name */
#define BOARD_INITRS_GPIO_DEINIT_RsRx_SIGNAL IN /*!< Signal name */
#define BOARD_INITRS_GPIO_DEINIT_RsRx_CHANNEL 5U /*!< Signal channel */
/*! /*!
* @brief This is a de-initialization function for 'BOARD_InitRS_GPIO' function. * @brief This is a de-initialization function for 'BOARD_InitRS_GPIO' function.

40
bsp/generated/clock_config.c
View file

@ -72,7 +72,7 @@ outputs:
- {id: IPG_CLK_ROOT.outFreq, value: 150 MHz} - {id: IPG_CLK_ROOT.outFreq, value: 150 MHz}
- {id: LCDIF_CLK_ROOT.outFreq, value: 3 MHz} - {id: LCDIF_CLK_ROOT.outFreq, value: 3 MHz}
- {id: LPI2C_CLK_ROOT.outFreq, value: 60 MHz} - {id: LPI2C_CLK_ROOT.outFreq, value: 60 MHz}
- {id: LPSPI_CLK_ROOT.outFreq, value: 6 MHz} - {id: LPSPI_CLK_ROOT.outFreq, value: 105.6 MHz}
- {id: LVDS1_CLK.outFreq, value: 1.2 GHz} - {id: LVDS1_CLK.outFreq, value: 1.2 GHz}
- {id: MQS_MCLK.outFreq, value: 1080/17 MHz} - {id: MQS_MCLK.outFreq, value: 1080/17 MHz}
- {id: PERCLK_CLK_ROOT.outFreq, value: 75 MHz} - {id: PERCLK_CLK_ROOT.outFreq, value: 75 MHz}
@ -89,26 +89,42 @@ outputs:
- {id: SAI3_MCLK3.outFreq, value: 30 MHz} - {id: SAI3_MCLK3.outFreq, value: 30 MHz}
- {id: SEMC_CLK_ROOT.outFreq, value: 120 MHz} - {id: SEMC_CLK_ROOT.outFreq, value: 120 MHz}
- {id: SPDIF0_CLK_ROOT.outFreq, value: 30 MHz} - {id: SPDIF0_CLK_ROOT.outFreq, value: 30 MHz}
- {id: TRACE_CLK_ROOT.outFreq, value: 6 MHz} - {id: TRACE_CLK_ROOT.outFreq, value: 99 MHz}
- {id: UART_CLK_ROOT.outFreq, value: 80 MHz} - {id: UART_CLK_ROOT.outFreq, value: 80 MHz}
- {id: USDHC1_CLK_ROOT.outFreq, value: 12 MHz} - {id: USBPHY1_CLK.outFreq, value: 480 MHz}
- {id: USDHC2_CLK_ROOT.outFreq, value: 12 MHz} - {id: USDHC1_CLK_ROOT.outFreq, value: 198 MHz}
- {id: USDHC2_CLK_ROOT.outFreq, value: 79.2 MHz}
settings: settings:
- {id: CCM.AHB_PODF.scale, value: '1', locked: true} - {id: CCM.AHB_PODF.scale, value: '1', locked: true}
- {id: CCM.ARM_PODF.scale, value: '2', locked: true} - {id: CCM.ARM_PODF.scale, value: '2', locked: true}
- {id: CCM.CAN_CLK_PODF.scale, value: '1', locked: true} - {id: CCM.CAN_CLK_PODF.scale, value: '1', locked: true}
- {id: CCM.LCDIF_PRE_CLK_SEL.sel, value: CCM_ANALOG.PLL5_MAIN_CLK} - {id: CCM.LCDIF_PRE_CLK_SEL.sel, value: CCM_ANALOG.PLL5_MAIN_CLK}
- {id: CCM.LPSPI_PODF.scale, value: '5'}
- {id: CCM.PERCLK_PODF.scale, value: '2', locked: true} - {id: CCM.PERCLK_PODF.scale, value: '2', locked: true}
- {id: CCM.PERIPH_CLK2_SEL.sel, value: XTALOSC24M.OSC_CLK} - {id: CCM.PERIPH_CLK2_SEL.sel, value: XTALOSC24M.OSC_CLK}
- {id: CCM.SEMC_PODF.scale, value: '5', locked: true} - {id: CCM.SEMC_PODF.scale, value: '5', locked: true}
- {id: CCM.USDHC1_CLK_SEL.sel, value: CCM_ANALOG.PLL2_PFD0_CLK}
- {id: CCM.USDHC1_PODF.scale, value: '2', locked: true}
- {id: CCM.USDHC2_PODF.scale, value: '5'}
- {id: CCM_ANALOG.PLL1_BYPASS.sel, value: CCM_ANALOG.PLL1} - {id: CCM_ANALOG.PLL1_BYPASS.sel, value: CCM_ANALOG.PLL1}
- {id: CCM_ANALOG.PLL1_PREDIV.scale, value: '1', locked: true} - {id: CCM_ANALOG.PLL1_PREDIV.scale, value: '1', locked: true}
- {id: CCM_ANALOG.PLL1_VDIV.scale, value: '50', locked: true} - {id: CCM_ANALOG.PLL1_VDIV.scale, value: '50', locked: true}
- {id: CCM_ANALOG.PLL2.denom, value: '1'}
- {id: CCM_ANALOG.PLL2.num, value: '0'}
- {id: CCM_ANALOG.PLL2_BYPASS.sel, value: CCM_ANALOG.PLL2_OUT_CLK}
- {id: CCM_ANALOG.PLL2_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD0}
- {id: CCM_ANALOG.PLL2_PFD0_DIV.scale, value: '24', locked: true}
- {id: CCM_ANALOG.PLL2_PFD0_MUL.scale, value: '18', locked: true}
- {id: CCM_ANALOG.PLL2_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD1}
- {id: CCM_ANALOG.PLL2_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD2}
- {id: CCM_ANALOG.PLL2_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD3}
- {id: CCM_ANALOG.PLL3_BYPASS.sel, value: CCM_ANALOG.PLL3} - {id: CCM_ANALOG.PLL3_BYPASS.sel, value: CCM_ANALOG.PLL3}
- {id: CCM_ANALOG.PLL3_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD0} - {id: CCM_ANALOG.PLL3_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD0}
- {id: CCM_ANALOG.PLL3_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD1} - {id: CCM_ANALOG.PLL3_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD1}
- {id: CCM_ANALOG.PLL3_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD2} - {id: CCM_ANALOG.PLL3_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD2}
- {id: CCM_ANALOG.PLL3_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD3} - {id: CCM_ANALOG.PLL3_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD3}
- {id: CCM_ANALOG_PLL_USB1_EN_USB_CLKS_CFG, value: Enabled}
- {id: CCM_ANALOG_PLL_USB1_EN_USB_CLKS_OUT_CFG, value: Enabled}
- {id: CCM_ANALOG_PLL_USB1_POWER_CFG, value: 'Yes'} - {id: CCM_ANALOG_PLL_USB1_POWER_CFG, value: 'Yes'}
sources: sources:
- {id: XTALOSC24M.RTC_OSC.outFreq, value: 32.768 kHz, enabled: true} - {id: XTALOSC24M.RTC_OSC.outFreq, value: 32.768 kHz, enabled: true}
@ -125,8 +141,8 @@ const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN =
const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN = const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN =
{ {
.loopDivider = 1, /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */ .loopDivider = 1, /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */
.numerator = 1, /* 30 bit numerator of fractional loop divider */ .numerator = 0, /* 30 bit numerator of fractional loop divider */
.denominator = 60000, /* 30 bit denominator of fractional loop divider */ .denominator = 1, /* 30 bit denominator of fractional loop divider */
.src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
}; };
const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN = const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN =
@ -198,11 +214,11 @@ void BOARD_BootClockRUN(void)
/* Set USDHC1_PODF. */ /* Set USDHC1_PODF. */
CLOCK_SetDiv(kCLOCK_Usdhc1Div, 1); CLOCK_SetDiv(kCLOCK_Usdhc1Div, 1);
/* Set Usdhc1 clock source. */ /* Set Usdhc1 clock source. */
CLOCK_SetMux(kCLOCK_Usdhc1Mux, 0); CLOCK_SetMux(kCLOCK_Usdhc1Mux, 1);
/* Disable USDHC2 clock gate. */ /* Disable USDHC2 clock gate. */
CLOCK_DisableClock(kCLOCK_Usdhc2); CLOCK_DisableClock(kCLOCK_Usdhc2);
/* Set USDHC2_PODF. */ /* Set USDHC2_PODF. */
CLOCK_SetDiv(kCLOCK_Usdhc2Div, 1); CLOCK_SetDiv(kCLOCK_Usdhc2Div, 4);
/* Set Usdhc2 clock source. */ /* Set Usdhc2 clock source. */
CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0); CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0);
/* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd. /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
@ -241,7 +257,7 @@ void BOARD_BootClockRUN(void)
CLOCK_DisableClock(kCLOCK_Lpspi3); CLOCK_DisableClock(kCLOCK_Lpspi3);
CLOCK_DisableClock(kCLOCK_Lpspi4); CLOCK_DisableClock(kCLOCK_Lpspi4);
/* Set LPSPI_PODF. */ /* Set LPSPI_PODF. */
CLOCK_SetDiv(kCLOCK_LpspiDiv, 3); CLOCK_SetDiv(kCLOCK_LpspiDiv, 4);
/* Set Lpspi clock source. */ /* Set Lpspi clock source. */
CLOCK_SetMux(kCLOCK_LpspiMux, 2); CLOCK_SetMux(kCLOCK_LpspiMux, 2);
/* Disable TRACE clock gate. */ /* Disable TRACE clock gate. */
@ -350,15 +366,13 @@ void BOARD_BootClockRUN(void)
/* Init System PLL. */ /* Init System PLL. */
CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN); CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN);
/* Init System pfd0. */ /* Init System pfd0. */
CLOCK_InitSysPfd(kCLOCK_Pfd0, 27); CLOCK_InitSysPfd(kCLOCK_Pfd0, 24);
/* Init System pfd1. */ /* Init System pfd1. */
CLOCK_InitSysPfd(kCLOCK_Pfd1, 16); CLOCK_InitSysPfd(kCLOCK_Pfd1, 16);
/* Init System pfd2. */ /* Init System pfd2. */
CLOCK_InitSysPfd(kCLOCK_Pfd2, 24); CLOCK_InitSysPfd(kCLOCK_Pfd2, 24);
/* Init System pfd3. */ /* Init System pfd3. */
CLOCK_InitSysPfd(kCLOCK_Pfd3, 16); CLOCK_InitSysPfd(kCLOCK_Pfd3, 16);
/* Bypass System PLL. */
CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllSys, 1);
#endif #endif
/* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd. /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
* With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged. * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
@ -374,8 +388,6 @@ void BOARD_BootClockRUN(void)
CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17); CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17);
/* Init Usb1 pfd3. */ /* Init Usb1 pfd3. */
CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 19); CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 19);
/* Disable Usb1 PLL output for USBPHY1. */
CCM_ANALOG->PLL_USB1 &= ~CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK;
#endif #endif
/* DeInit Audio PLL. */ /* DeInit Audio PLL. */
CLOCK_DeinitAudioPll(); CLOCK_DeinitAudioPll();

10
bsp/generated/clock_config.h
View file

@ -63,7 +63,7 @@ void BOARD_InitBootClocks(void);
#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT 150000000UL /* Clock consumers of IPG_CLK_ROOT output : ADC1, ADC2, ADC_ETC, AOI1, AOI2, ARM, BEE, CAN1, CAN2, CCM, CMP1, CMP2, CMP3, CMP4, CSI, CSU, DCDC, DCP, DMA0, DMAMUX, ENC1, ENC2, ENC3, ENC4, ENET, EWM, FLEXIO1, FLEXIO2, FLEXRAM, FLEXSPI, GPC, GPIO1, GPIO2, GPIO3, GPIO4, GPIO5, IOMUXC, KPP, LCDIF, LPI2C1, LPI2C2, LPI2C3, LPI2C4, LPSPI1, LPSPI2, LPSPI3, LPSPI4, LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8, OCOTP, PMU, PWM1, PWM2, PWM3, PWM4, PXP, ROMC, RTWDOG, SAI1, SAI2, SAI3, SNVS, SPDIF, SRC, TEMPMON, TMR1, TMR2, TMR3, TMR4, TRNG, TSC, USB1, USB2, USDHC1, USDHC2, WDOG1, WDOG2, XBARA1, XBARB2, XBARB3 */ #define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT 150000000UL /* Clock consumers of IPG_CLK_ROOT output : ADC1, ADC2, ADC_ETC, AOI1, AOI2, ARM, BEE, CAN1, CAN2, CCM, CMP1, CMP2, CMP3, CMP4, CSI, CSU, DCDC, DCP, DMA0, DMAMUX, ENC1, ENC2, ENC3, ENC4, ENET, EWM, FLEXIO1, FLEXIO2, FLEXRAM, FLEXSPI, GPC, GPIO1, GPIO2, GPIO3, GPIO4, GPIO5, IOMUXC, KPP, LCDIF, LPI2C1, LPI2C2, LPI2C3, LPI2C4, LPSPI1, LPSPI2, LPSPI3, LPSPI4, LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8, OCOTP, PMU, PWM1, PWM2, PWM3, PWM4, PXP, ROMC, RTWDOG, SAI1, SAI2, SAI3, SNVS, SPDIF, SRC, TEMPMON, TMR1, TMR2, TMR3, TMR4, TRNG, TSC, USB1, USB2, USDHC1, USDHC2, WDOG1, WDOG2, XBARA1, XBARB2, XBARB3 */
#define BOARD_BOOTCLOCKRUN_LCDIF_CLK_ROOT 3000000UL /* Clock consumers of LCDIF_CLK_ROOT output : LCDIF */ #define BOARD_BOOTCLOCKRUN_LCDIF_CLK_ROOT 3000000UL /* Clock consumers of LCDIF_CLK_ROOT output : LCDIF */
#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT 60000000UL /* Clock consumers of LPI2C_CLK_ROOT output : LPI2C1, LPI2C2, LPI2C3, LPI2C4 */ #define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT 60000000UL /* Clock consumers of LPI2C_CLK_ROOT output : LPI2C1, LPI2C2, LPI2C3, LPI2C4 */
#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT 6000000UL /* Clock consumers of LPSPI_CLK_ROOT output : LPSPI1, LPSPI2, LPSPI3, LPSPI4 */ #define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT 105600000UL /* Clock consumers of LPSPI_CLK_ROOT output : LPSPI1, LPSPI2, LPSPI3, LPSPI4 */
#define BOARD_BOOTCLOCKRUN_LVDS1_CLK 1200000000UL /* Clock consumers of LVDS1_CLK output : N/A */ #define BOARD_BOOTCLOCKRUN_LVDS1_CLK 1200000000UL /* Clock consumers of LVDS1_CLK output : N/A */
#define BOARD_BOOTCLOCKRUN_MQS_MCLK 63529411UL /* Clock consumers of MQS_MCLK output : N/A */ #define BOARD_BOOTCLOCKRUN_MQS_MCLK 63529411UL /* Clock consumers of MQS_MCLK output : N/A */
#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT 75000000UL /* Clock consumers of PERCLK_CLK_ROOT output : GPT1, GPT2, PIT */ #define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT 75000000UL /* Clock consumers of PERCLK_CLK_ROOT output : GPT1, GPT2, PIT */
@ -83,12 +83,12 @@ void BOARD_InitBootClocks(void);
#define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT 120000000UL /* Clock consumers of SEMC_CLK_ROOT output : SEMC */ #define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT 120000000UL /* Clock consumers of SEMC_CLK_ROOT output : SEMC */
#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL /* Clock consumers of SPDIF0_CLK_ROOT output : SPDIF */ #define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL /* Clock consumers of SPDIF0_CLK_ROOT output : SPDIF */
#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL /* Clock consumers of SPDIF0_EXTCLK_OUT output : SPDIF */ #define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL /* Clock consumers of SPDIF0_EXTCLK_OUT output : SPDIF */
#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 6000000UL /* Clock consumers of TRACE_CLK_ROOT output : ARM */ #define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 99000000UL /* Clock consumers of TRACE_CLK_ROOT output : ARM */
#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL /* Clock consumers of UART_CLK_ROOT output : LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8 */ #define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL /* Clock consumers of UART_CLK_ROOT output : LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8 */
#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL /* Clock consumers of USBPHY1_CLK output : TEMPMON, USB1 */ #define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 480000000UL /* Clock consumers of USBPHY1_CLK output : TEMPMON, USB1 */
#define BOARD_BOOTCLOCKRUN_USBPHY2_CLK 0UL /* Clock consumers of USBPHY2_CLK output : USB2 */ #define BOARD_BOOTCLOCKRUN_USBPHY2_CLK 0UL /* Clock consumers of USBPHY2_CLK output : USB2 */
#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 12000000UL /* Clock consumers of USDHC1_CLK_ROOT output : USDHC1 */ #define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 198000000UL /* Clock consumers of USDHC1_CLK_ROOT output : USDHC1 */
#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT 12000000UL /* Clock consumers of USDHC2_CLK_ROOT output : USDHC2 */ #define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT 79200000UL /* Clock consumers of USDHC2_CLK_ROOT output : USDHC2 */
/*! @brief Arm PLL set for BOARD_BootClockRUN configuration. /*! @brief Arm PLL set for BOARD_BootClockRUN configuration.
*/ */

41
bsp/generated/sdmmc_config.c
View file

@ -24,6 +24,15 @@ static sd_io_voltage_t s_io_voltage = {
.func = NULL, /* управление через регистры USDHC, не через внешний LDO */ .func = NULL, /* управление через регистры USDHC, не через внешний LDO */
}; };
/* Debug markers for runtime verification in debugger. */
volatile uint32_t g_sdmmc_dbg_dma_buf_addr = 0U;
volatile uint32_t g_sdmmc_dbg_usdhc1_src_clock_hz = 0U;
static bool sd_card_detect_gpio(void)
{
return GPIO_PinRead(BOARD_SDMMC_SD_CD_GPIO_BASE, BOARD_SDMMC_SD_CD_GPIO_PIN) == BOARD_SDMMC_SD_CD_INSERT_LEVEL;
}
/* --------------------------------------------------------------------------- /* ---------------------------------------------------------------------------
* Внутренние функции * Внутренние функции
* ------------------------------------------------------------------------- */ * ------------------------------------------------------------------------- */
@ -36,7 +45,7 @@ static sd_io_voltage_t s_io_voltage = {
*/ */
static uint32_t get_usdhc1_src_clock_hz(void) static uint32_t get_usdhc1_src_clock_hz(void)
{ {
return BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT; /* 198 000 000 Hz */ return BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT;
} }
/* /*
@ -44,7 +53,11 @@ static uint32_t get_usdhc1_src_clock_hz(void)
*/ */
static void sd_power_control(bool enable) static void sd_power_control(bool enable)
{ {
#if BOARD_SDMMC_SD_PWR_ACTIVE_HIGH
GPIO_PinWrite(BOARD_SDMMC_SD_PWR_GPIO_BASE, BOARD_SDMMC_SD_PWR_GPIO_PIN, enable ? 1U : 0U); GPIO_PinWrite(BOARD_SDMMC_SD_PWR_GPIO_BASE, BOARD_SDMMC_SD_PWR_GPIO_PIN, enable ? 1U : 0U);
#else
GPIO_PinWrite(BOARD_SDMMC_SD_PWR_GPIO_BASE, BOARD_SDMMC_SD_PWR_GPIO_PIN, enable ? 0U : 1U);
#endif
} }
/* /*
@ -55,7 +68,11 @@ static void sd_power_init(void)
{ {
const gpio_pin_config_t cfg = { const gpio_pin_config_t cfg = {
.direction = kGPIO_DigitalOutput, .direction = kGPIO_DigitalOutput,
#if BOARD_SDMMC_SD_PWR_ACTIVE_HIGH
.outputLogic = 0U, /* питание выключено при старте */ .outputLogic = 0U, /* питание выключено при старте */
#else
.outputLogic = 1U, /* питание выключено при старте */
#endif
.interruptMode = kGPIO_NoIntmode, .interruptMode = kGPIO_NoIntmode,
}; };
GPIO_PinInit(BOARD_SDMMC_SD_PWR_GPIO_BASE, BOARD_SDMMC_SD_PWR_GPIO_PIN, &cfg); GPIO_PinInit(BOARD_SDMMC_SD_PWR_GPIO_BASE, BOARD_SDMMC_SD_PWR_GPIO_PIN, &cfg);
@ -106,6 +123,10 @@ static void sd_pin_config(uint32_t freq)
IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_03_USDHC1_DATA1, pad); IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_03_USDHC1_DATA1, pad);
IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_04_USDHC1_DATA2, pad); IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_04_USDHC1_DATA2, pad);
IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3, pad); IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3, pad);
/* CD_B в GPIO-режиме: подтяжка вверх + hysteresis для стабильного уровня. */
IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_12_GPIO2_IO28,
IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1));
} }
/* --------------------------------------------------------------------------- /* ---------------------------------------------------------------------------
@ -127,11 +148,13 @@ void BOARD_SD_Config(void *card, sd_cd_t cd, uint32_t host_irq_priority, void *u
sd->host = &s_host; sd->host = &s_host;
sd->host->hostController.base = BOARD_SDMMC_SD_HOST_BASEADDR; sd->host->hostController.base = BOARD_SDMMC_SD_HOST_BASEADDR;
sd->host->hostController.sourceClock_Hz = get_usdhc1_src_clock_hz(); sd->host->hostController.sourceClock_Hz = get_usdhc1_src_clock_hz();
g_sdmmc_dbg_dma_buf_addr = (uint32_t)(uintptr_t)s_dma_buf;
g_sdmmc_dbg_usdhc1_src_clock_hz = sd->host->hostController.sourceClock_Hz;
/* --- card detect: HostCD, GPIO-прерывание не нужно --- */ /* --- card detect: GPIO CD (active-low) --- */
s_cd.cdDebounce_ms = BOARD_SDMMC_SD_CD_DEBOUNCE_MS; s_cd.cdDebounce_ms = BOARD_SDMMC_SD_CD_DEBOUNCE_MS;
s_cd.type = BOARD_SDMMC_SD_CD_TYPE; /* kSD_DetectCardByHostCD */ s_cd.type = BOARD_SDMMC_SD_CD_TYPE;
s_cd.cardDetected = NULL; /* SDK читает PRSSTAT самостоятельно */ s_cd.cardDetected = sd_card_detect_gpio;
s_cd.callback = cd; /* обычно NULL из bsp_sd */ s_cd.callback = cd; /* обычно NULL из bsp_sd */
s_cd.userData = user_data; s_cd.userData = user_data;
@ -143,6 +166,16 @@ void BOARD_SD_Config(void *card, sd_cd_t cd, uint32_t host_irq_priority, void *u
/* --- GPIO питания --- */ /* --- GPIO питания --- */
sd_power_init(); sd_power_init();
/* CD_B: переводим в GPIO2_IO28 и настраиваем вход */
IOMUXC_SetPinMux(IOMUXC_GPIO_B1_12_GPIO2_IO28, 0U);
const gpio_pin_config_t cd_cfg = {
.direction = kGPIO_DigitalInput,
.outputLogic = 0U,
.interruptMode = kGPIO_NoIntmode,
};
GPIO_PinInit(BOARD_SDMMC_SD_CD_GPIO_BASE, BOARD_SDMMC_SD_CD_GPIO_PIN, &cd_cfg);
/* Важно: применяем pad-конфиг сразу для ранних CMD (CMD0/CMD8/CMD55/ACMD41). */
sd_pin_config(400000U);
/* --- приоритет прерывания хоста --- */ /* --- приоритет прерывания хоста --- */
NVIC_SetPriority(BOARD_SDMMC_SD_HOST_IRQ, host_irq_priority); NVIC_SetPriority(BOARD_SDMMC_SD_HOST_IRQ, host_irq_priority);

18
bsp/generated/sdmmc_config.h
View file

@ -1,9 +1,8 @@
/* /*
* sdmmc_config.h — board-level конфигурация SDMMC для MIMXRT1052CVJ5B. * sdmmc_config.h — board-level конфигурация SDMMC для MIMXRT1052CVJ5B.
* *
* SD_CD : GPIO_B1_12 → USDHC1.usdhc_cd_b (периферийный сигнал, не GPIO). * SD_CD : GPIO_B1_12 → GPIO2[28] (GPIO card detect).
* Детект через USDHC_GetPresentStatusFlags → kSD_DetectCardByHostCD. * Уровень вставки карты: 0 (active-low).
* GPIO-прерывание на CD не нужно.
* *
* SD_PWR: GPIO_AD_B1_03 → GPIO1[19] (SdPwr). * SD_PWR: GPIO_AD_B1_03 → GPIO1[19] (SdPwr).
* Active-high: 1 = питание включено. * Active-high: 1 = питание включено.
@ -34,7 +33,10 @@
* CD_B подключён как периферийный сигнал USDHC1 — детект через регистр * CD_B подключён как периферийный сигнал USDHC1 — детект через регистр
* PRSSTAT, а не через GPIO. Прерывание и callback на CD не используются. * PRSSTAT, а не через GPIO. Прерывание и callback на CD не используются.
* ------------------------------------------------------------------------- */ * ------------------------------------------------------------------------- */
#define BOARD_SDMMC_SD_CD_TYPE kSD_DetectCardByHostCD #define BOARD_SDMMC_SD_CD_GPIO_BASE GPIO2
#define BOARD_SDMMC_SD_CD_GPIO_PIN 28U
#define BOARD_SDMMC_SD_CD_INSERT_LEVEL 0U
#define BOARD_SDMMC_SD_CD_TYPE kSD_DetectCardByGpioCD
#define BOARD_SDMMC_SD_CD_DEBOUNCE_MS 100U #define BOARD_SDMMC_SD_CD_DEBOUNCE_MS 100U
/* --------------------------------------------------------------------------- /* ---------------------------------------------------------------------------
@ -42,11 +44,17 @@
* ------------------------------------------------------------------------- */ * ------------------------------------------------------------------------- */
#define BOARD_SDMMC_SD_PWR_GPIO_BASE GPIO1 #define BOARD_SDMMC_SD_PWR_GPIO_BASE GPIO1
#define BOARD_SDMMC_SD_PWR_GPIO_PIN 19U #define BOARD_SDMMC_SD_PWR_GPIO_PIN 19U
/* 1U: питание карты включается уровнем '1'; 0U: включается уровнем '0'. */
#define BOARD_SDMMC_SD_PWR_ACTIVE_HIGH 0U
/* --------------------------------------------------------------------------- /* ---------------------------------------------------------------------------
* IO voltage — управляется хостом (LDO внутри USDHC) * IO voltage — управляется хостом (LDO внутри USDHC)
* ------------------------------------------------------------------------- */ * ------------------------------------------------------------------------- */
#define BOARD_SDMMC_SD_IO_VOLTAGE_TYPE kSD_IOVoltageCtrlByHost /*
* На данной плате для SD-стека отключаем процедуру переключения на 1.8V
* (CMD11/UHS voltage switch): SD_Init продолжит работу в 3.3V режиме.
*/
#define BOARD_SDMMC_SD_IO_VOLTAGE_TYPE kSD_IOVoltageCtrlNotSupport
/* --------------------------------------------------------------------------- /* ---------------------------------------------------------------------------
* DMA и кэш * DMA и кэш

6
bsp/sd/README.md
View file

@ -43,8 +43,8 @@ sdk_usdhc ← NXP HAL: fsl_usdhc
| CLK | GPIO_SD_B0_01 | USDHC1_CLK, периферийный режим | | CLK | GPIO_SD_B0_01 | USDHC1_CLK, периферийный режим |
| CMD | GPIO_SD_B0_00 | USDHC1_CMD, периферийный режим | | CMD | GPIO_SD_B0_00 | USDHC1_CMD, периферийный режим |
| D0–D3 | GPIO_SD_B0_02–05| USDHC1_DATA0–3, периферийный режим | | D0–D3 | GPIO_SD_B0_02–05| USDHC1_DATA0–3, периферийный режим |
| CD_B | GPIO_B1_12 | USDHC1_CD_B — детект через USDHC PRSSTAT | | CD_B | GPIO_B1_12 | USDHC1_CD_B — детект через GPIO2[28] |
| SdPwr | GPIO_AD_B1_03 | GPIO1[19], active-high, управляется SDK через BSP | | SdPwr | GPIO_AD_B1_03 | GPIO1[19], active-low, управляется SDK через BSP |
**CD_B** подключён как периферийный сигнал USDHC1, а не как GPIO. Детект карты **CD_B** подключён как периферийный сигнал USDHC1, а не как GPIO. Детект карты
читается через `USDHC_GetPresentStatusFlags` → `kUSDHC_CardInsertedFlag`. читается через `USDHC_GetPresentStatusFlags` → `kUSDHC_CardInsertedFlag`.
@ -93,7 +93,7 @@ host-контроллер (`SD_HostInit`).
## Разделение ответственности: bsp_sd vs sdmmc_config vs port_fatfs_sd ## Разделение ответственности: bsp_sd vs sdmmc_config vs port_fatfs_sd
| Слой | Что делает | Где живёт | | Слой | Что делает | Где живёт |
|-----------------------|---------------------------------------------------------|------------------------| |-----------------------|---------------------------------------------------------|------------------------------------|
| `sdmmc_config` | Константы платы, `BOARD_SD_Config`, GPIO питания, pads | `bsp/generated/` | | `sdmmc_config` | Константы платы, `BOARD_SD_Config`, GPIO питания, pads | `bsp/generated/` |
| `bsp_sd` | `SD_HostInit/Deinit`, идемпотентность, card detect | `bsp/sd/` | | `bsp_sd` | `SD_HostInit/Deinit`, идемпотентность, card detect | `bsp/sd/` |
| `port_fatfs_sd` | `microsd_disk_*` → `fsl_sd_disk` (FatFS diskio glue) | `port/fatfs/sd/` | | `port_fatfs_sd` | `microsd_disk_*` → `fsl_sd_disk` (FatFS diskio glue) | `port/fatfs/sd/` |

15
bsp/sd/src/sd.c
View file

@ -4,7 +4,6 @@
#include "bsp/sd.h" #include "bsp/sd.h"
#include "fsl_clock.h"
#include "fsl_sd.h" #include "fsl_sd.h"
#include "sdmmc_config.h" /* BOARD_SD_Config, BOARD_SDMMC_SD_HOST_BASEADDR */ #include "sdmmc_config.h" /* BOARD_SD_Config, BOARD_SDMMC_SD_HOST_BASEADDR */
@ -74,20 +73,12 @@ bsp_status_t bsp_sd_deinit(void)
SD_SetCardPower(&g_sd, false); SD_SetCardPower(&g_sd, false);
g_s_initialized = false; g_s_initialized = false;
g_s_host_configured = false;
return BSP_OK; return BSP_OK;
} }
bool bsp_sd_is_inserted(void) bool bsp_sd_is_inserted(void)
{ {
/* return GPIO_PinRead(BOARD_SDMMC_SD_CD_GPIO_BASE, BOARD_SDMMC_SD_CD_GPIO_PIN) ==
* CD_B подключён как периферийный сигнал USDHC1, поэтому детект — BOARD_SDMMC_SD_CD_INSERT_LEVEL;
* через регистр PRSSTAT, а не GPIO.
*
* USDHC1 может быть ещё не тактирован в момент вызова (до init),
* поэтому явно включаем clock. После init clock уже включён SDK-стеком,
* повторный вызов CLOCK_EnableClock безвреден.
*/
CLOCK_EnableClock(kCLOCK_Usdhc1);
uint32_t prsstat = USDHC_GetPresentStatusFlags(BOARD_SDMMC_SD_HOST_BASEADDR);
return (prsstat & (uint32_t) kUSDHC_CardInsertedFlag) != 0U;
} }

2
firmware/test/fatfs/src/diskio.c
View file

@ -1,7 +1,7 @@
/* /*
* diskio.c — FatFS diskio диспетчер для firmware_test. * diskio.c — FatFS diskio диспетчер для firmware_test.
* *
* FF_VOLUMES=1: единственный диск "0:/" = SDDISK. * FF_VOLUMES=3: диски 0 и 1 — заглушки, диск 2 = SDDISK (microSD).
* W25Q и RAM-диск отсутствуют — нет зависимости на bsp_qspi_flash. * W25Q и RAM-диск отсутствуют — нет зависимости на bsp_qspi_flash.
*/ */

3
sdk/CMakeLists.txt
View file

@ -37,7 +37,8 @@ add_library(sdk_common STATIC devices/MIMXRT1052/drivers/fsl_common.c
devices/MIMXRT1052/drivers/fsl_common_arm.c) devices/MIMXRT1052/drivers/fsl_common_arm.c)
target_include_directories(sdk_common PUBLIC devices/MIMXRT1052/drivers) target_include_directories(sdk_common PUBLIC devices/MIMXRT1052/drivers)
target_compile_definitions( target_compile_definitions(
sdk_common PUBLIC SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY=600000000U) sdk_common PUBLIC SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY=600000000U
SDK_DELAY_USE_DWT)
target_link_libraries(sdk_common PUBLIC sdk_device) target_link_libraries(sdk_common PUBLIC sdk_device)
add_sdk_driver(clock fsl_clock.c) add_sdk_driver(clock fsl_clock.c)

7
sdk/devices/MIMXRT1052/drivers/fsl_usdhc.c
View file

@ -202,6 +202,9 @@ static void USDHC_TransferHandleReTuning(USDHC_Type *base, usdhc_handle_t *handl
/******************************************************************************* /*******************************************************************************
* Variables * Variables
******************************************************************************/ ******************************************************************************/
/* Bring-up telemetry: inspect in debugger watch window. */
volatile uint32_t g_usdhc_dbg_last_data_interrupt_flags = 0U;
volatile uint32_t g_usdhc_dbg_last_data_transfer_status = 0U;
/*! @brief USDHC base pointer array */ /*! @brief USDHC base pointer array */
static USDHC_Type *const s_usdhcBase[] = USDHC_BASE_PTRS; static USDHC_Type *const s_usdhcBase[] = USDHC_BASE_PTRS;
@ -2257,6 +2260,8 @@ static void USDHC_TransferHandleData(USDHC_Type *base, usdhc_handle_t *handle, u
(IS_USDHC_FLAG_SET(interruptFlags, (uint32_t)kUSDHC_DataErrorFlag | (uint32_t)kUSDHC_DmaErrorFlag))) (IS_USDHC_FLAG_SET(interruptFlags, (uint32_t)kUSDHC_DataErrorFlag | (uint32_t)kUSDHC_DmaErrorFlag)))
{ {
transferStatus = kStatus_USDHC_TransferDataFailed; transferStatus = kStatus_USDHC_TransferDataFailed;
g_usdhc_dbg_last_data_interrupt_flags = interruptFlags;
g_usdhc_dbg_last_data_transfer_status = (uint32_t)transferStatus;
} }
else else
{ {
@ -2315,6 +2320,8 @@ static void USDHC_TransferHandleData(USDHC_Type *base, usdhc_handle_t *handle, u
(IS_USDHC_FLAG_SET(interruptFlags, (uint32_t)kUSDHC_DataErrorFlag | (uint32_t)kUSDHC_DmaErrorFlag))) (IS_USDHC_FLAG_SET(interruptFlags, (uint32_t)kUSDHC_DataErrorFlag | (uint32_t)kUSDHC_DmaErrorFlag)))
{ {
transferStatus = kStatus_USDHC_TransferDataFailed; transferStatus = kStatus_USDHC_TransferDataFailed;
g_usdhc_dbg_last_data_interrupt_flags = interruptFlags;
g_usdhc_dbg_last_data_transfer_status = (uint32_t)transferStatus;
} }
else else
{ {

16
sdk/middleware/sdmmc/host/usdhc/non_blocking/fsl_sdmmc_host.c
View file

@ -73,6 +73,12 @@ static status_t SDMMCHOST_ExecuteManualTuning(sdmmchost_t *host,
/******************************************************************************* /*******************************************************************************
* Variables * Variables
******************************************************************************/ ******************************************************************************/
/* Debug telemetry for bring-up: inspect in debugger watch window. */
volatile uint32_t g_sdmmc_dbg_last_event = 0U;
volatile uint32_t g_sdmmc_dbg_last_error = 0U;
volatile uint32_t g_sdmmc_dbg_last_irqstat = 0U;
volatile uint32_t g_sdmmc_dbg_last_prsstat = 0U;
volatile uint32_t g_sdmmc_dbg_last_wait_stage = 0U; /* 1=cmd wait, 2=data wait */
/******************************************************************************* /*******************************************************************************
* Code * Code
@ -511,11 +517,16 @@ status_t SDMMCHOST_TransferFunction(sdmmchost_t *host, sdmmchost_transfer_t *con
if (error == kStatus_Success) if (error == kStatus_Success)
{ {
/* wait command event */ /* wait command event */
g_sdmmc_dbg_last_wait_stage = 1U;
if ((kStatus_Fail == SDMMC_OSAEventWait(&(host->hostEvent), SDMMCHOST_TRANSFER_CMD_EVENT, if ((kStatus_Fail == SDMMC_OSAEventWait(&(host->hostEvent), SDMMCHOST_TRANSFER_CMD_EVENT,
SDMMCHOST_TRANSFER_COMPLETE_TIMEOUT, &event)) || SDMMCHOST_TRANSFER_COMPLETE_TIMEOUT, &event)) ||
((event & SDMMC_OSA_EVENT_TRANSFER_CMD_FAIL) != 0U)) ((event & SDMMC_OSA_EVENT_TRANSFER_CMD_FAIL) != 0U))
{ {
error = kStatus_Fail; error = kStatus_Fail;
g_sdmmc_dbg_last_event = event;
g_sdmmc_dbg_last_error = (uint32_t)error;
g_sdmmc_dbg_last_irqstat = USDHC_GetInterruptStatusFlags(host->hostController.base);
g_sdmmc_dbg_last_prsstat = USDHC_GetPresentStatusFlags(host->hostController.base);
} }
else else
{ {
@ -523,12 +534,17 @@ status_t SDMMCHOST_TransferFunction(sdmmchost_t *host, sdmmchost_transfer_t *con
{ {
if ((event & SDMMC_OSA_EVENT_TRANSFER_DATA_SUCCESS) == 0U) if ((event & SDMMC_OSA_EVENT_TRANSFER_DATA_SUCCESS) == 0U)
{ {
g_sdmmc_dbg_last_wait_stage = 2U;
if (((event & SDMMC_OSA_EVENT_TRANSFER_DATA_FAIL) != 0U) || if (((event & SDMMC_OSA_EVENT_TRANSFER_DATA_FAIL) != 0U) ||
(kStatus_Fail == SDMMC_OSAEventWait(&(host->hostEvent), SDMMCHOST_TRANSFER_DATA_EVENT, (kStatus_Fail == SDMMC_OSAEventWait(&(host->hostEvent), SDMMCHOST_TRANSFER_DATA_EVENT,
SDMMCHOST_TRANSFER_COMPLETE_TIMEOUT, &event) || SDMMCHOST_TRANSFER_COMPLETE_TIMEOUT, &event) ||
((event & SDMMC_OSA_EVENT_TRANSFER_DATA_FAIL) != 0U))) ((event & SDMMC_OSA_EVENT_TRANSFER_DATA_FAIL) != 0U)))
{ {
error = kStatus_Fail; error = kStatus_Fail;
g_sdmmc_dbg_last_event = event;
g_sdmmc_dbg_last_error = (uint32_t)error;
g_sdmmc_dbg_last_irqstat = USDHC_GetInterruptStatusFlags(host->hostController.base);
g_sdmmc_dbg_last_prsstat = USDHC_GetPresentStatusFlags(host->hostController.base);
} }
} }
} }

263
sdk/middleware/sdmmc/sd/fsl_sd.c
View file

@ -103,7 +103,8 @@ static status_t SD_SendRca(sd_card_t *card);
* @retval kStatus_SDMMC_TransferFailed Transfer failed. * @retval kStatus_SDMMC_TransferFailed Transfer failed.
* @retval kStatus_Success Operate successfully. * @retval kStatus_Success Operate successfully.
*/ */
static status_t SD_SwitchFunction(sd_card_t *card, uint32_t mode, uint32_t group, uint32_t number, uint32_t *status); static status_t SD_SwitchFunction(sd_card_t *card, uint32_t mode, uint32_t group, uint32_t number,
uint32_t *status);
/*! /*!
* @brief Decode raw SCR register content in the data blocks. * @brief Decode raw SCR register content in the data blocks.
@ -249,7 +250,8 @@ static void SD_DecodeStatus(sd_card_t *card, uint32_t *src);
* @retval kStatus_SDMMC_StopTransmissionFailed Stop transmission failed. * @retval kStatus_SDMMC_StopTransmissionFailed Stop transmission failed.
* @retval kStatus_Success Operate successfully. * @retval kStatus_Success Operate successfully.
*/ */
static status_t SD_Read(sd_card_t *card, uint8_t *buffer, uint32_t startBlock, uint32_t blockSize, uint32_t blockCount); static status_t SD_Read(sd_card_t *card, uint8_t *buffer, uint32_t startBlock, uint32_t blockSize,
uint32_t blockCount);
/*! /*!
* @brief Write data to specific card * @brief Write data to specific card
@ -265,12 +267,8 @@ static status_t SD_Read(sd_card_t *card, uint8_t *buffer, uint32_t startBlock, u
* @retval kStatus_SDMMC_StopTransmissionFailed Stop transmission failed. * @retval kStatus_SDMMC_StopTransmissionFailed Stop transmission failed.
* @retval kStatus_Success Operate successfully. * @retval kStatus_Success Operate successfully.
*/ */
static status_t SD_Write(sd_card_t *card, static status_t SD_Write(sd_card_t *card, const uint8_t *buffer, uint32_t startBlock,
const uint8_t *buffer, uint32_t blockSize, uint32_t blockCount, uint32_t *writtenBlocks);
uint32_t startBlock,
uint32_t blockSize,
uint32_t blockCount,
uint32_t *writtenBlocks);
/*! /*!
* @brief Erase data for the given block range. * @brief Erase data for the given block range.
@ -284,7 +282,8 @@ static status_t SD_Write(sd_card_t *card,
* @retval kStatus_SDMMC_TransferFailed Transfer failed. * @retval kStatus_SDMMC_TransferFailed Transfer failed.
* @retval kStatus_Success Operate successfully. * @retval kStatus_Success Operate successfully.
*/ */
static status_t SD_Erase(sd_card_t *card, uint32_t startBlock, uint32_t blockCount, uint32_t timeout); static status_t SD_Erase(sd_card_t *card, uint32_t startBlock, uint32_t blockCount,
uint32_t timeout);
/*! /*!
* @brief card transfer function. * @brief card transfer function.
@ -356,13 +355,15 @@ static status_t SD_ExecuteTuning(sd_card_t *card)
{ {
assert(card != NULL); assert(card != NULL);
return SDMMCHOST_ExecuteTuning(card->host, (uint32_t)kSD_SendTuningBlock, return SDMMCHOST_ExecuteTuning(
card->host, (uint32_t) kSD_SendTuningBlock,
(uint32_t *) FSL_SDMMC_CARD_INTERNAL_BUFFER_ALIGN_ADDR(card->internalBuffer), 64U); (uint32_t *) FSL_SDMMC_CARD_INTERNAL_BUFFER_ALIGN_ADDR(card->internalBuffer), 64U);
} }
static status_t SD_SwitchIOVoltage(sd_card_t *card, sdmmc_operation_voltage_t voltage) static status_t SD_SwitchIOVoltage(sd_card_t *card, sdmmc_operation_voltage_t voltage)
{ {
if ((card->usrParam.ioVoltage != NULL) && (card->usrParam.ioVoltage->type == kSD_IOVoltageCtrlByGpio)) if ((card->usrParam.ioVoltage != NULL) &&
(card->usrParam.ioVoltage->type == kSD_IOVoltageCtrlByGpio))
{ {
/* make sure card signal line voltage is 3.3v before initalization */ /* make sure card signal line voltage is 3.3v before initalization */
if (card->usrParam.ioVoltage->func != NULL) if (card->usrParam.ioVoltage->func != NULL)
@ -371,7 +372,8 @@ static status_t SD_SwitchIOVoltage(sd_card_t *card, sdmmc_operation_voltage_t vo
} }
} }
#if SDMMCHOST_SUPPORT_VOLTAGE_CONTROL #if SDMMCHOST_SUPPORT_VOLTAGE_CONTROL
else if ((card->usrParam.ioVoltage != NULL) && (card->usrParam.ioVoltage->type == kSD_IOVoltageCtrlByHost)) else if ((card->usrParam.ioVoltage != NULL) &&
(card->usrParam.ioVoltage->type == kSD_IOVoltageCtrlByHost))
{ {
SDMMCHOST_SwitchToVoltage(card->host, (uint32_t) voltage); SDMMCHOST_SwitchToVoltage(card->host, (uint32_t) voltage);
} }
@ -405,7 +407,8 @@ static status_t SD_SwitchVoltage(sd_card_t *card, sdmmc_operation_voltage_t volt
} }
/* check data line and cmd line status */ /* check data line and cmd line status */
if (SDMMCHOST_GetSignalLineStatus(card->host, (uint32_t)kSDMMC_SignalLineData0 | (uint32_t)kSDMMC_SignalLineData1 | if (SDMMCHOST_GetSignalLineStatus(card->host, (uint32_t) kSDMMC_SignalLineData0 |
(uint32_t) kSDMMC_SignalLineData1 |
(uint32_t) kSDMMC_SignalLineData2 | (uint32_t) kSDMMC_SignalLineData2 |
(uint32_t) kSDMMC_SignalLineData3) != 0U) (uint32_t) kSDMMC_SignalLineData3) != 0U)
{ {
@ -428,7 +431,8 @@ static status_t SD_SwitchVoltage(sd_card_t *card, sdmmc_operation_voltage_t volt
SDMMCHOST_ForceClockOn(card->host, false); SDMMCHOST_ForceClockOn(card->host, false);
/* check data line and cmd line status */ /* check data line and cmd line status */
if (SDMMCHOST_GetSignalLineStatus(card->host, (uint32_t)kSDMMC_SignalLineData0 | (uint32_t)kSDMMC_SignalLineData1 | if (SDMMCHOST_GetSignalLineStatus(card->host, (uint32_t) kSDMMC_SignalLineData0 |
(uint32_t) kSDMMC_SignalLineData1 |
(uint32_t) kSDMMC_SignalLineData2 | (uint32_t) kSDMMC_SignalLineData2 |
(uint32_t) kSDMMC_SignalLineData3) == 0U) (uint32_t) kSDMMC_SignalLineData3) == 0U)
{ {
@ -437,13 +441,14 @@ static status_t SD_SwitchVoltage(sd_card_t *card, sdmmc_operation_voltage_t volt
SD_SetCardPower(card, false); SD_SetCardPower(card, false);
SD_SetCardPower(card, true); SD_SetCardPower(card, true);
/* re-check the data line status */ /* re-check the data line status */
if (SDMMCHOST_GetSignalLineStatus( if (SDMMCHOST_GetSignalLineStatus(card->host, (uint32_t) kSDMMC_SignalLineData0 |
card->host, (uint32_t)kSDMMC_SignalLineData0 | (uint32_t)kSDMMC_SignalLineData1 | (uint32_t) kSDMMC_SignalLineData1 |
(uint32_t)kSDMMC_SignalLineData2 | (uint32_t)kSDMMC_SignalLineData3) != 0U) (uint32_t) kSDMMC_SignalLineData2 |
(uint32_t) kSDMMC_SignalLineData3) != 0U)
{ {
error = kStatus_SDMMC_SwitchVoltage18VFail33VSuccess; error = kStatus_SDMMC_SwitchVoltage18VFail33VSuccess;
SDMMC_LOG( SDMMC_LOG("\r\nNote: Current card support 1.8V, but board don't support, so sdmmc "
"\r\nNote: Current card support 1.8V, but board don't support, so sdmmc switch back to 3.3V.\r\n"); "switch back to 3.3V.\r\n");
} }
else else
{ {
@ -475,7 +480,8 @@ static status_t SD_StopTransmission(sd_card_t *card)
error = SDMMCHOST_TransferFunction(card->host, &content); error = SDMMCHOST_TransferFunction(card->host, &content);
if (kStatus_Success != error) if (kStatus_Success != error)
{ {
SDMMC_LOG("\r\nError: send CMD12 failed with host error %d, reponse %x\r\n", error, command.response[0U]); SDMMC_LOG("\r\nError: send CMD12 failed with host error %d, reponse %x\r\n", error,
command.response[0U]);
return kStatus_SDMMC_TransferFailed; return kStatus_SDMMC_TransferFailed;
} }
@ -511,7 +517,8 @@ static status_t SD_Transfer(sd_card_t *card, sdmmchost_transfer_t *content, uint
if ((retry == 0U) || (error == kStatus_SDMMC_ReTuningRequest)) if ((retry == 0U) || (error == kStatus_SDMMC_ReTuningRequest))
{ {
if ((card->currentTiming == kSD_TimingSDR50Mode) || (card->currentTiming == kSD_TimingSDR104Mode)) if ((card->currentTiming == kSD_TimingSDR50Mode) ||
(card->currentTiming == kSD_TimingSDR104Mode))
{ {
if (--retuningCount == 0U) if (--retuningCount == 0U)
{ {
@ -566,7 +573,8 @@ static status_t SD_SendCardStatus(sd_card_t *card)
error = SDMMCHOST_TransferFunction(card->host, &content); error = SDMMCHOST_TransferFunction(card->host, &content);
if (kStatus_Success != error) if (kStatus_Success != error)
{ {
SDMMC_LOG("\r\nError: send CMD13 failed with host error %d, response %x\r\n", error, command.response[0U]); SDMMC_LOG("\r\nError: send CMD13 failed with host error %d, response %x\r\n", error,
command.response[0U]);
retry--; retry--;
continue; continue;
} }
@ -627,7 +635,8 @@ static status_t SD_SendWriteSuccessBlocks(sd_card_t *card, uint32_t *blocks)
sdmmchost_cmd_t command = { 0 }; sdmmchost_cmd_t command = { 0 };
sdmmchost_data_t data = { 0 }; sdmmchost_data_t data = { 0 };
status_t error = kStatus_Success; status_t error = kStatus_Success;
uint32_t *rawBuffer = (uint32_t *)FSL_SDMMC_CARD_INTERNAL_BUFFER_ALIGN_ADDR(card->internalBuffer); uint32_t *rawBuffer =
(uint32_t *) FSL_SDMMC_CARD_INTERNAL_BUFFER_ALIGN_ADDR(card->internalBuffer);
(void) memset(rawBuffer, 0, 4U); (void) memset(rawBuffer, 0, 4U);
@ -655,7 +664,8 @@ static status_t SD_SendWriteSuccessBlocks(sd_card_t *card, uint32_t *blocks)
error = SDMMCHOST_TransferFunction(card->host, &content); error = SDMMCHOST_TransferFunction(card->host, &content);
if ((kStatus_Success != error) || (((command.response[0U]) & SDMMC_R1_ALL_ERROR_FLAG) != 0U)) if ((kStatus_Success != error) || (((command.response[0U]) & SDMMC_R1_ALL_ERROR_FLAG) != 0U))
{ {
SDMMC_LOG("\r\nError: send ACMD22 failed with host error %d, response %x\r\n", error, command.response[0U]); SDMMC_LOG("\r\nError: send ACMD22 failed with host error %d, response %x\r\n", error,
command.response[0U]);
} }
else else
{ {
@ -687,13 +697,15 @@ static status_t SD_SendRca(sd_card_t *card)
} }
else else
{ {
SDMMC_LOG("\r\nError: send CMD3 failed with host error %d, response %x\r\n", error, command.response[0U]); SDMMC_LOG("\r\nError: send CMD3 failed with host error %d, response %x\r\n", error,
command.response[0U]);
} }
return error; return error;
} }
static status_t SD_SwitchFunction(sd_card_t *card, uint32_t mode, uint32_t group, uint32_t number, uint32_t *status) static status_t SD_SwitchFunction(sd_card_t *card, uint32_t mode, uint32_t group, uint32_t number,
uint32_t *status)
{ {
assert(card != NULL); assert(card != NULL);
assert(status != NULL); assert(status != NULL);
@ -718,7 +730,8 @@ static status_t SD_SwitchFunction(sd_card_t *card, uint32_t mode, uint32_t group
error = SDMMCHOST_TransferFunction(card->host, &content); error = SDMMCHOST_TransferFunction(card->host, &content);
if ((kStatus_Success != error) || (((command.response[0U]) & SDMMC_R1_ALL_ERROR_FLAG) != 0U)) if ((kStatus_Success != error) || (((command.response[0U]) & SDMMC_R1_ALL_ERROR_FLAG) != 0U))
{ {
SDMMC_LOG("\r\n\r\nError: send CMD6 failed with host error %d, response %x\r\n", error, command.response[0U]); SDMMC_LOG("\r\n\r\nError: send CMD6 failed with host error %d, response %x\r\n", error,
command.response[0U]);
} }
return error; return error;
@ -784,7 +797,8 @@ static void SD_DecodeScr(sd_card_t *card, uint32_t *rawScr)
card->flags |= (uint32_t) kSD_SupportSetBlockCountCmd; card->flags |= (uint32_t) kSD_SupportSetBlockCountCmd;
} }
} }
volatile uint32_t irqstat = 0U;
volatile uint32_t prsstat = 0U;
static status_t SD_SendScr(sd_card_t *card) static status_t SD_SendScr(sd_card_t *card)
{ {
assert(card != NULL); assert(card != NULL);
@ -816,11 +830,15 @@ static status_t SD_SendScr(sd_card_t *card)
error = SDMMCHOST_TransferFunction(card->host, &content); error = SDMMCHOST_TransferFunction(card->host, &content);
if ((kStatus_Success != error) || (((command.response[0U]) & SDMMC_R1_ALL_ERROR_FLAG) != 0U)) if ((kStatus_Success != error) || (((command.response[0U]) & SDMMC_R1_ALL_ERROR_FLAG) != 0U))
{ {
SDMMC_LOG("\r\nError: send ACMD51 failed with host error %d, response %x\r\n", error, command.response[0U]); irqstat = USDHC_GetInterruptStatusFlags(card->host->hostController.base);
prsstat = USDHC_GetPresentStatusFlags(card->host->hostController.base);
SDMMC_LOG("\r\nError: send ACMD51 failed: host=%d resp=%08x irqstat=%08x prsstat=%08x\r\n",
error, command.response[0U], irqstat, prsstat);
} }
else else
{ {
SDMMCHOST_ConvertDataToLittleEndian(card->host, rawScr, 2U, kSDMMC_DataPacketFormatMSBFirst); SDMMCHOST_ConvertDataToLittleEndian(card->host, rawScr, 2U,
kSDMMC_DataPacketFormatMSBFirst);
/* decode scr */ /* decode scr */
SD_DecodeScr(card, rawScr); SD_DecodeScr(card, rawScr);
} }
@ -832,7 +850,8 @@ static status_t SD_SelectFunction(sd_card_t *card, uint32_t group, uint32_t func
{ {
assert(card != NULL); assert(card != NULL);
uint32_t *functionStatus = (uint32_t *)FSL_SDMMC_CARD_INTERNAL_BUFFER_ALIGN_ADDR(card->internalBuffer); uint32_t *functionStatus =
(uint32_t *) FSL_SDMMC_CARD_INTERNAL_BUFFER_ALIGN_ADDR(card->internalBuffer);
uint16_t functionGroupInfo[6U] = { 0 }; uint16_t functionGroupInfo[6U] = { 0 };
uint32_t currentFunctionStatus = 0U; uint32_t currentFunctionStatus = 0U;
status_t error = kStatus_Success; status_t error = kStatus_Success;
@ -855,7 +874,8 @@ static status_t SD_SelectFunction(sd_card_t *card, uint32_t group, uint32_t func
return kStatus_SDMMC_TransferFailed; return kStatus_SDMMC_TransferFailed;
} }
/* convert to little endian sequence */ /* convert to little endian sequence */
SDMMCHOST_ConvertDataToLittleEndian(card->host, functionStatus, 5U, kSDMMC_DataPacketFormatMSBFirst); SDMMCHOST_ConvertDataToLittleEndian(card->host, functionStatus, 5U,
kSDMMC_DataPacketFormatMSBFirst);
/* -functionStatus[0U]---bit511~bit480; /* -functionStatus[0U]---bit511~bit480;
-functionStatus[1U]---bit479~bit448; -functionStatus[1U]---bit479~bit448;
@ -890,7 +910,8 @@ static status_t SD_SelectFunction(sd_card_t *card, uint32_t group, uint32_t func
} }
/* convert to little endian sequence */ /* convert to little endian sequence */
SDMMCHOST_ConvertDataToLittleEndian(card->host, &functionStatus[3U], 2U, kSDMMC_DataPacketFormatMSBFirst); SDMMCHOST_ConvertDataToLittleEndian(card->host, &functionStatus[3U], 2U,
kSDMMC_DataPacketFormatMSBFirst);
/* According to the "switch function status[bits 511~0]" return by switch command in mode "set function": /* According to the "switch function status[bits 511~0]" return by switch command in mode "set function":
-check if group 1 is successfully changed to function 1 by checking if bits 379~376 equal value 1; -check if group 1 is successfully changed to function 1 by checking if bits 379~376 equal value 1;
@ -940,7 +961,8 @@ static status_t SD_SetDataBusWidth(sd_card_t *card, uint32_t width)
error = SDMMCHOST_TransferFunction(card->host, &content); error = SDMMCHOST_TransferFunction(card->host, &content);
if ((kStatus_Success != error) || (((command.response[0U]) & SDMMC_R1_ALL_ERROR_FLAG) != 0U)) if ((kStatus_Success != error) || (((command.response[0U]) & SDMMC_R1_ALL_ERROR_FLAG) != 0U))
{ {
SDMMC_LOG("\r\nError: send ACMD6 failed with host error %d, response %x\r\n", error, command.response[0U]); SDMMC_LOG("\r\nError: send ACMD6 failed with host error %d, response %x\r\n", error,
command.response[0U]);
} }
return error; return error;
@ -1156,7 +1178,8 @@ static status_t SD_ApplicationSendOperationCondition(sd_card_t *card, uint32_t a
error = SDMMCHOST_TransferFunction(card->host, &content); error = SDMMCHOST_TransferFunction(card->host, &content);
if (kStatus_Success != error) if (kStatus_Success != error)
{ {
SDMMC_LOG("\r\nError: send ACMD41 failed with host error %d, response %x\r\n", error, command.response[0U]); SDMMC_LOG("\r\nError: send ACMD41 failed with host error %d, response %x\r\n", error,
command.response[0U]);
return kStatus_SDMMC_TransferFailed; return kStatus_SDMMC_TransferFailed;
} }
@ -1206,7 +1229,8 @@ static status_t SD_SendInterfaceCondition(sd_card_t *card)
error = SDMMCHOST_TransferFunction(card->host, &content); error = SDMMCHOST_TransferFunction(card->host, &content);
if (kStatus_Success != error) if (kStatus_Success != error)
{ {
SDMMC_LOG("\r\nError: send CMD8 failed with host error %d, response %x\r\n", error, command.response[0U]); SDMMC_LOG("\r\nError: send CMD8 failed with host error %d, response %x\r\n", error,
command.response[0U]);
} }
else else
{ {
@ -1240,8 +1264,8 @@ static status_t SD_SelectBusTiming(sd_card_t *card)
if (error == kStatus_Success) if (error == kStatus_Success)
{ {
card->currentTiming = kSD_TimingSDR25HighSpeedMode; card->currentTiming = kSD_TimingSDR25HighSpeedMode;
card->busClock_Hz = card->busClock_Hz = SDMMCHOST_SetCardClock(
SDMMCHOST_SetCardClock(card->host, FSL_SDMMC_CARD_MAX_BUS_FREQ(card->usrParam.maxFreq, SD_CLOCK_50MHZ)); card->host, FSL_SDMMC_CARD_MAX_BUS_FREQ(card->usrParam.maxFreq, SD_CLOCK_50MHZ));
} }
else else
{ {
@ -1273,7 +1297,8 @@ static status_t SD_SelectBusTiming(sd_card_t *card)
{ {
card->currentTiming = kSD_TimingSDR104Mode; card->currentTiming = kSD_TimingSDR104Mode;
card->busClock_Hz = SDMMCHOST_SetCardClock( card->busClock_Hz = SDMMCHOST_SetCardClock(
card->host, FSL_SDMMC_CARD_MAX_BUS_FREQ(card->usrParam.maxFreq, SD_CLOCK_208MHZ)); card->host,
FSL_SDMMC_CARD_MAX_BUS_FREQ(card->usrParam.maxFreq, SD_CLOCK_208MHZ));
break; break;
} }
} }
@ -1288,7 +1313,8 @@ static status_t SD_SelectBusTiming(sd_card_t *card)
{ {
card->currentTiming = kSD_TimingDDR50Mode; card->currentTiming = kSD_TimingDDR50Mode;
card->busClock_Hz = SDMMCHOST_SetCardClock( card->busClock_Hz = SDMMCHOST_SetCardClock(
card->host, FSL_SDMMC_CARD_MAX_BUS_FREQ(card->usrParam.maxFreq, SD_CLOCK_50MHZ)); card->host,
FSL_SDMMC_CARD_MAX_BUS_FREQ(card->usrParam.maxFreq, SD_CLOCK_50MHZ));
SDMMCHOST_EnableDDRMode(card->host, true, 0U); SDMMCHOST_EnableDDRMode(card->host, true, 0U);
break; break;
} }
@ -1305,7 +1331,8 @@ static status_t SD_SelectBusTiming(sd_card_t *card)
{ {
card->currentTiming = kSD_TimingSDR50Mode; card->currentTiming = kSD_TimingSDR50Mode;
card->busClock_Hz = SDMMCHOST_SetCardClock( card->busClock_Hz = SDMMCHOST_SetCardClock(
card->host, FSL_SDMMC_CARD_MAX_BUS_FREQ(card->usrParam.maxFreq, SD_CLOCK_100MHZ)); card->host,
FSL_SDMMC_CARD_MAX_BUS_FREQ(card->usrParam.maxFreq, SD_CLOCK_100MHZ));
break; break;
} }
} }
@ -1320,7 +1347,8 @@ static status_t SD_SelectBusTiming(sd_card_t *card)
{ {
card->currentTiming = kSD_TimingSDR25HighSpeedMode; card->currentTiming = kSD_TimingSDR25HighSpeedMode;
card->busClock_Hz = SDMMCHOST_SetCardClock( card->busClock_Hz = SDMMCHOST_SetCardClock(
card->host, FSL_SDMMC_CARD_MAX_BUS_FREQ(card->usrParam.maxFreq, SD_CLOCK_50MHZ)); card->host,
FSL_SDMMC_CARD_MAX_BUS_FREQ(card->usrParam.maxFreq, SD_CLOCK_50MHZ));
break; break;
} }
} }
@ -1338,7 +1366,8 @@ static status_t SD_SelectBusTiming(sd_card_t *card)
} }
/* SDR50 and SDR104 mode need tuning */ /* SDR50 and SDR104 mode need tuning */
if ((card->currentTiming == kSD_TimingSDR50Mode) || (card->currentTiming == kSD_TimingSDR104Mode)) if ((card->currentTiming == kSD_TimingSDR50Mode) ||
(card->currentTiming == kSD_TimingSDR104Mode))
{ {
/* execute tuning */ /* execute tuning */
if (SD_ExecuteTuning(card) != kStatus_Success) if (SD_ExecuteTuning(card) != kStatus_Success)
@ -1364,10 +1393,13 @@ static void SD_DecodeStatus(sd_card_t *card, uint32_t *src)
card->stat.speedClass = (uint8_t) ((src[2U] & 0xFF000000U) >> 24U); /* 447-440 */ card->stat.speedClass = (uint8_t) ((src[2U] & 0xFF000000U) >> 24U); /* 447-440 */
card->stat.performanceMove = (uint8_t) ((src[2U] & 0x00FF0000U) >> 16U); /* 439-432 */ card->stat.performanceMove = (uint8_t) ((src[2U] & 0x00FF0000U) >> 16U); /* 439-432 */
card->stat.auSize = (uint8_t) ((src[2U] & 0x0000F000U) >> 12U); /* 431-428 */ card->stat.auSize = (uint8_t) ((src[2U] & 0x0000F000U) >> 12U); /* 431-428 */
card->stat.eraseSize = (uint16_t)(((src[2U] & 0x000000FFU) << 8U) | ((src[3U] & 0xFF000000U) >> 24U)); /* 423-408 */ card->stat.eraseSize = (uint16_t) (((src[2U] & 0x000000FFU) << 8U) |
card->stat.eraseTimeout = (((uint8_t)((src[3U] & 0x00FF0000U) >> 16U)) & 0xFCU) >> 2U; /* 407-402 */ ((src[3U] & 0xFF000000U) >> 24U)); /* 423-408 */
card->stat.eraseTimeout =
(((uint8_t) ((src[3U] & 0x00FF0000U) >> 16U)) & 0xFCU) >> 2U; /* 407-402 */
card->stat.eraseOffset = ((uint8_t) ((src[3U] & 0x00FF0000U) >> 16U)) & 0x3U; /* 401-400 */ card->stat.eraseOffset = ((uint8_t) ((src[3U] & 0x00FF0000U) >> 16U)) & 0x3U; /* 401-400 */
card->stat.uhsSpeedGrade = (((uint8_t)((src[3U] & 0x0000FF00U) >> 8U)) & 0xF0U) >> 4U; /* 399-396 */ card->stat.uhsSpeedGrade =
(((uint8_t) ((src[3U] & 0x0000FF00U) >> 8U)) & 0xF0U) >> 4U; /* 399-396 */
card->stat.uhsAuSize = ((uint8_t) ((src[3U] & 0x0000FF00U) >> 8U)) & 0xFU; /* 395-392 */ card->stat.uhsAuSize = ((uint8_t) ((src[3U] & 0x0000FF00U) >> 8U)) & 0xFU; /* 395-392 */
} }
@ -1379,7 +1411,8 @@ status_t SD_ReadStatus(sd_card_t *card)
sdmmchost_cmd_t command = { 0 }; sdmmchost_cmd_t command = { 0 };
sdmmchost_data_t data = { 0 }; sdmmchost_data_t data = { 0 };
status_t error = kStatus_Success; status_t error = kStatus_Success;
uint32_t *rawPointer = (uint32_t *)FSL_SDMMC_CARD_INTERNAL_BUFFER_ALIGN_ADDR(card->internalBuffer); uint32_t *rawPointer =
(uint32_t *) FSL_SDMMC_CARD_INTERNAL_BUFFER_ALIGN_ADDR(card->internalBuffer);
(void) memset(rawPointer, 0, 64U); (void) memset(rawPointer, 0, 64U);
@ -1407,12 +1440,14 @@ status_t SD_ReadStatus(sd_card_t *card)
error = SD_Transfer(card, &content, 3U); error = SD_Transfer(card, &content, 3U);
if ((kStatus_Success != error) || (((command.response[0U]) & SDMMC_R1_ALL_ERROR_FLAG) != 0U)) if ((kStatus_Success != error) || (((command.response[0U]) & SDMMC_R1_ALL_ERROR_FLAG) != 0U))
{ {
SDMMC_LOG("\r\nError: send ACMD13 failed with host error %d, response %x\r\n", error, command.response[0U]); SDMMC_LOG("\r\nError: send ACMD13 failed with host error %d, response %x\r\n", error,
command.response[0U]);
return kStatus_SDMMC_TransferFailed; return kStatus_SDMMC_TransferFailed;
} }
/* switch to little endian sequence */ /* switch to little endian sequence */
SDMMCHOST_ConvertDataToLittleEndian(card->host, rawPointer, 16U, kSDMMC_DataPacketFormatMSBFirst); SDMMCHOST_ConvertDataToLittleEndian(card->host, rawPointer, 16U,
kSDMMC_DataPacketFormatMSBFirst);
SD_DecodeStatus(card, rawPointer); SD_DecodeStatus(card, rawPointer);
return kStatus_Success; return kStatus_Success;
@ -1449,7 +1484,8 @@ status_t SD_SetMaxCurrent(sd_card_t *card, sd_max_current_t maxCurrent)
return error; return error;
} }
static status_t SD_Read(sd_card_t *card, uint8_t *buffer, uint32_t startBlock, uint32_t blockSize, uint32_t blockCount) static status_t SD_Read(sd_card_t *card, uint8_t *buffer, uint32_t startBlock, uint32_t blockSize,
uint32_t blockCount)
{ {
assert(card != NULL); assert(card != NULL);
assert(buffer != NULL); assert(buffer != NULL);
@ -1461,7 +1497,8 @@ static status_t SD_Read(sd_card_t *card, uint8_t *buffer, uint32_t startBlock, u
sdmmchost_data_t data = { 0 }; sdmmchost_data_t data = { 0 };
if ((((card->flags & (uint32_t) kSD_SupportHighCapacityFlag) != 0U) && (blockSize != 512U)) || if ((((card->flags & (uint32_t) kSD_SupportHighCapacityFlag) != 0U) && (blockSize != 512U)) ||
(blockSize > card->blockSize) || (blockSize > card->host->maxBlockSize) || ((blockSize % 4U) != 0U)) (blockSize > card->blockSize) || (blockSize > card->host->maxBlockSize) ||
((blockSize % 4U) != 0U))
{ {
SDMMC_LOG("\r\nError: read with parameter, block size %d is not support\r\n", blockSize); SDMMC_LOG("\r\nError: read with parameter, block size %d is not support\r\n", blockSize);
return kStatus_SDMMC_CardNotSupport; return kStatus_SDMMC_CardNotSupport;
@ -1480,7 +1517,8 @@ static status_t SD_Read(sd_card_t *card, uint8_t *buffer, uint32_t startBlock, u
data.rxData = (uint32_t *) (uint32_t) buffer; data.rxData = (uint32_t *) (uint32_t) buffer;
data.enableAutoCommand12 = true; data.enableAutoCommand12 = true;
command.index = (blockCount == 1U) ? (uint32_t)kSDMMC_ReadSingleBlock : (uint32_t)kSDMMC_ReadMultipleBlock; command.index = (blockCount == 1U) ? (uint32_t) kSDMMC_ReadSingleBlock
: (uint32_t) kSDMMC_ReadMultipleBlock;
command.argument = startBlock; command.argument = startBlock;
if (0U == (card->flags & (uint32_t) kSD_SupportHighCapacityFlag)) if (0U == (card->flags & (uint32_t) kSD_SupportHighCapacityFlag))
{ {
@ -1501,12 +1539,8 @@ static status_t SD_Read(sd_card_t *card, uint8_t *buffer, uint32_t startBlock, u
return kStatus_Success; return kStatus_Success;
} }
static status_t SD_Write(sd_card_t *card, static status_t SD_Write(sd_card_t *card, const uint8_t *buffer, uint32_t startBlock,
const uint8_t *buffer, uint32_t blockSize, uint32_t blockCount, uint32_t *writtenBlocks)
uint32_t startBlock,
uint32_t blockSize,
uint32_t blockCount,
uint32_t *writtenBlocks)
{ {
assert(card != NULL); assert(card != NULL);
assert(buffer != NULL); assert(buffer != NULL);
@ -1519,7 +1553,8 @@ static status_t SD_Write(sd_card_t *card,
status_t error; status_t error;
if ((((card->flags & (uint32_t) kSD_SupportHighCapacityFlag) != 0U) && (blockSize != 512U)) || if ((((card->flags & (uint32_t) kSD_SupportHighCapacityFlag) != 0U) && (blockSize != 512U)) ||
(blockSize > card->blockSize) || (blockSize > card->host->maxBlockSize) || ((blockSize % 4U) != 0U)) (blockSize > card->blockSize) || (blockSize > card->host->maxBlockSize) ||
((blockSize % 4U) != 0U))
{ {
SDMMC_LOG("\r\nError: write with parameter, block size %d is not support\r\n", blockSize); SDMMC_LOG("\r\nError: write with parameter, block size %d is not support\r\n", blockSize);
return kStatus_SDMMC_CardNotSupport; return kStatus_SDMMC_CardNotSupport;
@ -1538,7 +1573,8 @@ static status_t SD_Write(sd_card_t *card,
command.responseType = kCARD_ResponseTypeR1; command.responseType = kCARD_ResponseTypeR1;
command.responseErrorFlags = SDMMC_R1_ALL_ERROR_FLAG; command.responseErrorFlags = SDMMC_R1_ALL_ERROR_FLAG;
command.index = (blockCount == 1U) ? (uint32_t)kSDMMC_WriteSingleBlock : (uint32_t)kSDMMC_WriteMultipleBlock; command.index = (blockCount == 1U) ? (uint32_t) kSDMMC_WriteSingleBlock
: (uint32_t) kSDMMC_WriteMultipleBlock;
command.argument = startBlock; command.argument = startBlock;
if (0U == (card->flags & (uint32_t) kSD_SupportHighCapacityFlag)) if (0U == (card->flags & (uint32_t) kSD_SupportHighCapacityFlag))
{ {
@ -1565,13 +1601,15 @@ static status_t SD_Write(sd_card_t *card,
error = kStatus_Success; error = kStatus_Success;
} }
} }
SDMMC_LOG("\r\nWarning: write failed with block count %d, successed %d\r\n", blockCount, *writtenBlocks); SDMMC_LOG("\r\nWarning: write failed with block count %d, successed %d\r\n", blockCount,
*writtenBlocks);
} }
return error; return error;
} }
static status_t SD_Erase(sd_card_t *card, uint32_t startBlock, uint32_t blockCount, uint32_t timeout) static status_t SD_Erase(sd_card_t *card, uint32_t startBlock, uint32_t blockCount,
uint32_t timeout)
{ {
assert(card != NULL); assert(card != NULL);
assert(blockCount != 0U); assert(blockCount != 0U);
@ -1610,8 +1648,8 @@ static status_t SD_Erase(sd_card_t *card, uint32_t startBlock, uint32_t blockCou
error = SD_Transfer(card, &content, 1U); error = SD_Transfer(card, &content, 1U);
if (kStatus_Success != error) if (kStatus_Success != error)
{ {
SDMMC_LOG("\r\nError: send CMD32(erase start) failed with host error %d, response %x\r\n", error, SDMMC_LOG("\r\nError: send CMD32(erase start) failed with host error %d, response %x\r\n",
command.response[0U]); error, command.response[0U]);
return kStatus_SDMMC_TransferFailed; return kStatus_SDMMC_TransferFailed;
} }
@ -1624,8 +1662,8 @@ static status_t SD_Erase(sd_card_t *card, uint32_t startBlock, uint32_t blockCou
error = SD_Transfer(card, &content, 0U); error = SD_Transfer(card, &content, 0U);
if (kStatus_Success != error) if (kStatus_Success != error)
{ {
SDMMC_LOG("\r\nError: send CMD33(erase end) failed with host error %d, response %x\r\n", error, SDMMC_LOG("\r\nError: send CMD33(erase end) failed with host error %d, response %x\r\n",
command.response[0U]); error, command.response[0U]);
return kStatus_SDMMC_TransferFailed; return kStatus_SDMMC_TransferFailed;
} }
@ -1676,7 +1714,8 @@ status_t SD_ReadBlocks(sd_card_t *card, uint8_t *buffer, uint32_t startBlock, ui
uint32_t blockDone = 0U; uint32_t blockDone = 0U;
uint8_t *nextBuffer = buffer; uint8_t *nextBuffer = buffer;
bool dataAddrAlign = true; bool dataAddrAlign = true;
uint8_t *alignBuffer = (uint8_t *)FSL_SDMMC_CARD_INTERNAL_BUFFER_ALIGN_ADDR(card->internalBuffer); uint8_t *alignBuffer =
(uint8_t *) FSL_SDMMC_CARD_INTERNAL_BUFFER_ALIGN_ADDR(card->internalBuffer);
status_t error = kStatus_Success; status_t error = kStatus_Success;
(void) SDMMC_OSAMutexLock(&card->lock, osaWaitForever_c); (void) SDMMC_OSAMutexLock(&card->lock, osaWaitForever_c);
@ -1686,7 +1725,8 @@ status_t SD_ReadBlocks(sd_card_t *card, uint8_t *buffer, uint32_t startBlock, ui
while (blockLeft != 0U) while (blockLeft != 0U)
{ {
nextBuffer = (uint8_t *) ((uint32_t) buffer + blockDone * FSL_SDMMC_DEFAULT_BLOCK_SIZE); nextBuffer = (uint8_t *) ((uint32_t) buffer + blockDone * FSL_SDMMC_DEFAULT_BLOCK_SIZE);
if ((!card->noInteralAlign) && (!dataAddrAlign || ((((uint32_t)nextBuffer) & (sizeof(uint32_t) - 1U)) != 0U))) if ((!card->noInteralAlign) &&
(!dataAddrAlign || ((((uint32_t) nextBuffer) & (sizeof(uint32_t) - 1U)) != 0U)))
{ {
blockCountOneTime = 1; blockCountOneTime = 1;
(void) memset(alignBuffer, 0, FSL_SDMMC_DEFAULT_BLOCK_SIZE); (void) memset(alignBuffer, 0, FSL_SDMMC_DEFAULT_BLOCK_SIZE);
@ -1728,19 +1768,22 @@ status_t SD_ReadBlocks(sd_card_t *card, uint8_t *buffer, uint32_t startBlock, ui
return error; return error;
} }
status_t SD_WriteBlocks(sd_card_t *card, const uint8_t *buffer, uint32_t startBlock, uint32_t blockCount) status_t SD_WriteBlocks(sd_card_t *card, const uint8_t *buffer, uint32_t startBlock,
uint32_t blockCount)
{ {
assert(card != NULL); assert(card != NULL);
assert(buffer != NULL); assert(buffer != NULL);
assert(blockCount != 0U); assert(blockCount != 0U);
assert((blockCount + startBlock) <= card->blockCount); assert((blockCount + startBlock) <= card->blockCount);
uint32_t blockCountOneTime = 0U; /* The block count can be wrote in one time sending WRITE_BLOCKS command. */ uint32_t blockCountOneTime =
0U; /* The block count can be wrote in one time sending WRITE_BLOCKS command. */
uint32_t blockWrittenOneTime = 0U; uint32_t blockWrittenOneTime = 0U;
uint32_t blockLeft = 0U; /* Left block count to be wrote. */ uint32_t blockLeft = 0U; /* Left block count to be wrote. */
const uint8_t *nextBuffer; const uint8_t *nextBuffer;
bool dataAddrAlign = true; bool dataAddrAlign = true;
uint8_t *alignBuffer = (uint8_t *)FSL_SDMMC_CARD_INTERNAL_BUFFER_ALIGN_ADDR(card->internalBuffer); uint8_t *alignBuffer =
(uint8_t *) FSL_SDMMC_CARD_INTERNAL_BUFFER_ALIGN_ADDR(card->internalBuffer);
status_t error = kStatus_Success; status_t error = kStatus_Success;
(void) SDMMC_OSAMutexLock(&card->lock, osaWaitForever_c); (void) SDMMC_OSAMutexLock(&card->lock, osaWaitForever_c);
@ -1748,8 +1791,10 @@ status_t SD_WriteBlocks(sd_card_t *card, const uint8_t *buffer, uint32_t startBl
blockLeft = blockCount; blockLeft = blockCount;
while (blockLeft != 0U) while (blockLeft != 0U)
{ {
nextBuffer = (uint8_t *)((uint32_t)buffer + (blockCount - blockLeft) * FSL_SDMMC_DEFAULT_BLOCK_SIZE); nextBuffer = (uint8_t *) ((uint32_t) buffer +
if (!card->noInteralAlign && (!dataAddrAlign || ((((uint32_t)nextBuffer) & (sizeof(uint32_t) - 1U)) != 0U))) (blockCount - blockLeft) * FSL_SDMMC_DEFAULT_BLOCK_SIZE);
if (!card->noInteralAlign &&
(!dataAddrAlign || ((((uint32_t) nextBuffer) & (sizeof(uint32_t) - 1U)) != 0U)))
{ {
blockCountOneTime = 1; blockCountOneTime = 1;
(void) memcpy(alignBuffer, nextBuffer, FSL_SDMMC_DEFAULT_BLOCK_SIZE); (void) memcpy(alignBuffer, nextBuffer, FSL_SDMMC_DEFAULT_BLOCK_SIZE);
@ -1767,8 +1812,9 @@ status_t SD_WriteBlocks(sd_card_t *card, const uint8_t *buffer, uint32_t startBl
} }
} }
error = SD_Write(card, dataAddrAlign ? nextBuffer : alignBuffer, (startBlock + blockCount - blockLeft), error = SD_Write(card, dataAddrAlign ? nextBuffer : alignBuffer,
FSL_SDMMC_DEFAULT_BLOCK_SIZE, blockCountOneTime, &blockWrittenOneTime); (startBlock + blockCount - blockLeft), FSL_SDMMC_DEFAULT_BLOCK_SIZE,
blockCountOneTime, &blockWrittenOneTime);
if (kStatus_Success != error) if (kStatus_Success != error)
{ {
error = kStatus_SDMMC_TransferFailed; error = kStatus_SDMMC_TransferFailed;
@ -1795,7 +1841,8 @@ status_t SD_EraseBlocks(sd_card_t *card, uint32_t startBlock, uint32_t blockCoun
assert((blockCount + startBlock) <= card->blockCount); assert((blockCount + startBlock) <= card->blockCount);
status_t error = kStatus_Success; status_t error = kStatus_Success;
uint32_t blockCountOneTime = 0U; /* The block count can be erased in one time sending ERASE_BLOCKS command. */ uint32_t blockCountOneTime =
0U; /* The block count can be erased in one time sending ERASE_BLOCKS command. */
uint32_t blockTail = 0U; /* The block tail has been erased. */ uint32_t blockTail = 0U; /* The block tail has been erased. */
uint32_t blockLeft = blockCount; /* Left block count to be erase. */ uint32_t blockLeft = blockCount; /* Left block count to be erase. */
uint32_t blockHead = startBlock; /* Completed block Index */ uint32_t blockHead = startBlock; /* Completed block Index */
@ -1812,15 +1859,16 @@ status_t SD_EraseBlocks(sd_card_t *card, uint32_t startBlock, uint32_t blockCoun
{ {
error = SD_Erase(card, startBlock, blockCount, 250U * blockCount); error = SD_Erase(card, startBlock, blockCount, 250U * blockCount);
} }
SDMMC_LOG("\r\n erase block directly: total %d, start %d, timeout %d, status %d \r\n", blockCount, startBlock, SDMMC_LOG("\r\n erase block directly: total %d, start %d, timeout %d, status %d \r\n",
250U * blockCount, error); blockCount, startBlock, 250U * blockCount, error);
} }
else else
{ {
/* UHS card should use uhs au size field */ /* UHS card should use uhs au size field */
if (card->operationVoltage == kSDMMC_OperationVoltage180V) if (card->operationVoltage == kSDMMC_OperationVoltage180V)
{ {
auBlocks = s_sdAuSizeMap[card->stat.uhsAuSize == 0U ? card->stat.auSize : card->stat.uhsAuSize] / auBlocks = s_sdAuSizeMap[card->stat.uhsAuSize == 0U ? card->stat.auSize
: card->stat.uhsAuSize] /
FSL_SDMMC_DEFAULT_BLOCK_SIZE; FSL_SDMMC_DEFAULT_BLOCK_SIZE;
} }
else else
@ -1828,7 +1876,8 @@ status_t SD_EraseBlocks(sd_card_t *card, uint32_t startBlock, uint32_t blockCoun
auBlocks = s_sdAuSizeMap[card->stat.auSize] / FSL_SDMMC_DEFAULT_BLOCK_SIZE; auBlocks = s_sdAuSizeMap[card->stat.auSize] / FSL_SDMMC_DEFAULT_BLOCK_SIZE;
} }
auTimeout = (((uint32_t)card->stat.eraseTimeout * 1000U) / (uint32_t)card->stat.eraseSize) + auTimeout =
(((uint32_t) card->stat.eraseTimeout * 1000U) / (uint32_t) card->stat.eraseSize) +
card->stat.eraseOffset * 1000U; card->stat.eraseOffset * 1000U;
/* erase blocks within one AU */ /* erase blocks within one AU */
@ -1836,8 +1885,9 @@ status_t SD_EraseBlocks(sd_card_t *card, uint32_t startBlock, uint32_t blockCoun
{ {
error = SD_Erase(card, startBlock, blockCount, auTimeout + 500U); error = SD_Erase(card, startBlock, blockCount, auTimeout + 500U);
SDMMC_LOG("\r\n erase blockS within AU : total %d, start %d, timeout %d, status %d \r\n", blockCount, SDMMC_LOG(
startBlock, auTimeout + 500U, error); "\r\n erase blockS within AU : total %d, start %d, timeout %d, status %d \r\n",
blockCount, startBlock, auTimeout + 500U, error);
} }
else else
{ {
@ -1847,7 +1897,8 @@ status_t SD_EraseBlocks(sd_card_t *card, uint32_t startBlock, uint32_t blockCoun
blockCountOneTime = (startBlock / auBlocks + 1U) * auBlocks - startBlock; blockCountOneTime = (startBlock / auBlocks + 1U) * auBlocks - startBlock;
error = SD_Erase(card, startBlock, blockCountOneTime, auTimeout + 250U); error = SD_Erase(card, startBlock, blockCountOneTime, auTimeout + 250U);
SDMMC_LOG("\r\n erase partially block head : total %d, start %d, timeout %d, status %d \r\n", SDMMC_LOG("\r\n erase partially block head : total %d, start %d, timeout %d, "
"status %d \r\n",
blockCountOneTime, startBlock, auTimeout + 250U, error); blockCountOneTime, startBlock, auTimeout + 250U, error);
} }
@ -1879,9 +1930,12 @@ status_t SD_EraseBlocks(sd_card_t *card, uint32_t startBlock, uint32_t blockCoun
blockLeft = 0U; blockLeft = 0U;
} }
error = SD_Erase(card, blockHead, blockCountOneTime, (blockCountOneTime / auBlocks) * auTimeout); error = SD_Erase(card, blockHead, blockCountOneTime,
SDMMC_LOG("\r\n erase AU block head : total %d, start %d, timeout %d, status %d \r\n", (blockCountOneTime / auBlocks) * auTimeout);
blockCountOneTime, blockHead, (blockCountOneTime / auBlocks) * auTimeout, error); SDMMC_LOG(
"\r\n erase AU block head : total %d, start %d, timeout %d, status %d \r\n",
blockCountOneTime, blockHead, (blockCountOneTime / auBlocks) * auTimeout,
error);
if (error != kStatus_Success) if (error != kStatus_Success)
{ {
break; break;
@ -1895,8 +1949,9 @@ status_t SD_EraseBlocks(sd_card_t *card, uint32_t startBlock, uint32_t blockCoun
if ((error == kStatus_Success) && (blockTail)) if ((error == kStatus_Success) && (blockTail))
{ {
error = SD_Erase(card, blockHead, blockTail, auTimeout + 250U); error = SD_Erase(card, blockHead, blockTail, auTimeout + 250U);
SDMMC_LOG("\r\n erase partially tail block : total %d, start %d, timeout %d, status %d \r\n", blockTail, SDMMC_LOG("\r\n erase partially tail block : total %d, start %d, timeout %d, "
blockHead, auTimeout + 250U, error); "status %d \r\n",
blockTail, blockHead, auTimeout + 250U, error);
} }
} }
} }
@ -1914,12 +1969,15 @@ static status_t SD_ProbeBusVoltage(sd_card_t *card)
status_t error = kStatus_Success; status_t error = kStatus_Success;
/* 3.3V voltage should be supported as default */ /* 3.3V voltage should be supported as default */
applicationCommand41Argument |= applicationCommand41Argument |= SDMMC_MASK(kSD_OcrVdd29_30Flag) |
SDMMC_MASK(kSD_OcrVdd29_30Flag) | SDMMC_MASK(kSD_OcrVdd32_33Flag) | SDMMC_MASK(kSD_OcrVdd33_34Flag); SDMMC_MASK(kSD_OcrVdd32_33Flag) |
SDMMC_MASK(kSD_OcrVdd33_34Flag);
if ((card->usrParam.ioVoltage != NULL) && (card->usrParam.ioVoltage->type != kSD_IOVoltageCtrlNotSupport) && if ((card->usrParam.ioVoltage != NULL) &&
(card->usrParam.ioVoltage->type != kSD_IOVoltageCtrlNotSupport) &&
((card->host->capability & (uint32_t) kSDMMCHOST_SupportVoltage1v8) != 0U) && ((card->host->capability & (uint32_t) kSDMMCHOST_SupportVoltage1v8) != 0U) &&
((card->host->capability & ((uint32_t)kSDMMCHOST_SupportSDR104 | (uint32_t)kSDMMCHOST_SupportSDR50 | ((card->host->capability &
((uint32_t) kSDMMCHOST_SupportSDR104 | (uint32_t) kSDMMCHOST_SupportSDR50 |
(uint32_t) kSDMMCHOST_SupportDDRMode)) != 0U)) (uint32_t) kSDMMCHOST_SupportDDRMode)) != 0U))
{ {
/* allow user select the work voltage, if not select, sdmmc will handle it automatically */ /* allow user select the work voltage, if not select, sdmmc will handle it automatically */
@ -1975,7 +2033,8 @@ static status_t SD_ProbeBusVoltage(sd_card_t *card)
/* check if card support 1.8V */ /* check if card support 1.8V */
if ((card->flags & (uint32_t) kSD_SupportVoltage180v) != 0U) if ((card->flags & (uint32_t) kSD_SupportVoltage180v) != 0U)
{ {
if ((card->usrParam.ioVoltage != NULL) && (card->usrParam.ioVoltage->type == kSD_IOVoltageCtrlNotSupport)) if ((card->usrParam.ioVoltage != NULL) &&
(card->usrParam.ioVoltage->type == kSD_IOVoltageCtrlNotSupport))
{ {
break; break;
} }
@ -2049,8 +2108,13 @@ static status_t sdcard_init(sd_card_t *card)
return kStatus_SDMMC_SelectCardFailed; return kStatus_SDMMC_SelectCardFailed;
} }
/* Set to max frequency in non-high speed mode. */ /*
card->busClock_Hz = SDMMCHOST_SetCardClock(card->host, SD_CLOCK_25MHZ); * Диагностический шаг для bring-up:
* поднимаем частоту не до 25MHz, а до более консервативной.
* Если SCR начинает читаться стабильно, проблема в signal integrity/таймингах
* при переходе на 25MHz, а не в логике SD-стека.
*/
card->busClock_Hz = SDMMCHOST_SetCardClock(card->host, 12000000U);
error = SD_SendScr(card); error = SD_SendScr(card);
if (kStatus_Success != error) if (kStatus_Success != error)
@ -2139,7 +2203,8 @@ status_t SD_HostInit(sd_card_t *card)
} }
} }
if ((card->usrParam.cd->type == kSD_DetectCardByHostCD) || (card->usrParam.cd->type == kSD_DetectCardByHostDATA3)) if ((card->usrParam.cd->type == kSD_DetectCardByHostCD) ||
(card->usrParam.cd->type == kSD_DetectCardByHostDATA3))
{ {
(void) SDMMCHOST_CardDetectInit(card->host, card->usrParam.cd); (void) SDMMCHOST_CardDetectInit(card->host, card->usrParam.cd);
} }
@ -2176,11 +2241,13 @@ void SD_SetCardPower(sd_card_t *card, bool enable)
if (enable) if (enable)
{ {
powerDelay = card->usrParam.powerOnDelayMS == 0U ? SD_POWER_ON_DELAY : card->usrParam.powerOnDelayMS; powerDelay =
card->usrParam.powerOnDelayMS == 0U ? SD_POWER_ON_DELAY : card->usrParam.powerOnDelayMS;
} }
else else
{ {
powerDelay = card->usrParam.powerOffDelayMS == 0U ? SD_POWER_OFF_DELAY : card->usrParam.powerOffDelayMS; powerDelay = card->usrParam.powerOffDelayMS == 0U ? SD_POWER_OFF_DELAY
: card->usrParam.powerOffDelayMS;
} }
SDMMC_OSADelay(powerDelay); SDMMC_OSADelay(powerDelay);