# Phase 5 - alpha-pyinstaller packed version of service-tui (MacOS tested)

just/host.just

@@ -566,3 +566,53 @@ service-build:
         --add-data "../shared:shared" \
         main.py
     echo "  ✅  dist/service_tui ready"
+
+# =============================================================================
+# ГРУППА: package — сборка service-tui в исполняемый бандл (PyInstaller)
+# =============================================================================
+
+_prod_dir := justfile_directory() / 'tools/production'
+_prod_build_dir := env('BUILD_DIR', justfile_directory() / 'build')
+
+[doc('Собрать service-tui в PyInstaller-бандл + скопировать firmware/*_hab.bin')]
+[group('package')]
+package-tui:
+    #!/usr/bin/env bash
+    set -euo pipefail
+
+    cd "{{ _prod_dir }}"
+    echo "  📦  Running PyInstaller..."
+    uv run pyinstaller service_tui.spec --noconfirm
+
+    DIST="dist/service_tui"
+
+    echo "  📦  Copying firmware HAB images (build/<Type>/*_hab.bin)..."
+    found=0
+    for type_dir in "{{ _prod_build_dir }}"/Debug "{{ _prod_build_dir }}"/Release; do
+        [[ -d "$type_dir" ]] || continue
+        type_name=$(basename "$type_dir")
+        for hab in "$type_dir"/*_hab.bin; do
+            [[ -f "$hab" ]] || continue
+            mkdir -p "$DIST/firmware/$type_name"
+            cp "$hab" "$DIST/firmware/$type_name/"
+            found=1
+        done
+    done
+    if [[ "$found" -eq 0 ]]; then
+        echo "  ⚠️   Ни один *_hab.bin не найден в {{ _prod_build_dir }} — соберите"
+        echo "       прошивки заранее (just build::hab-all-release / hab-all-debug)."
+    fi
+
+    VERSION=$(grep -m1 '^version' pyproject.toml | sed -E 's/.*"(.+)".*/\1/')
+    case "$(uname -s)" in
+        Linux*)               OS_TAG="linux"   ;;
+        Darwin*)              OS_TAG="macos"   ;;
+        MINGW*|MSYS*|CYGWIN*) OS_TAG="windows" ;;
+        *)                    OS_TAG="unknown" ;;
+    esac
+    RELEASE_NAME="service-tui-v${VERSION}-${OS_TAG}"
+
+    rm -rf "dist/${RELEASE_NAME}"
+    mkdir -p "dist/${RELEASE_NAME}/custom_binaries"
+    mv "$DIST" "dist/${RELEASE_NAME}"
+    echo "  ✅  dist/${RELEASE_NAME}"

tools/production/app/app.py

@@ -77,8 +77,11 @@ class ServiceApp(App):
             self._last_flash_preset = event.preset
 
         if event.target is None and not event.success:
+            self.switch_screen(
                 WaitingScreen(
-                disconnect_reason=event.error_message or "Соединение с платой потеряно"
+                    disconnect_reason=event.error_message
+                    or "Соединение с платой потеряно"
+                )
             )
             return
 

tools/production/app/flash_backend.py

@@ -51,14 +51,34 @@ ProgressCallback = Callable[[FlashProgress], None]
 # ─── Пути ────────────────────────────────────────────────────────────────
 # tools/production/app/flash_backend.py → корень репозитория
 REPO_ROOT = Path(__file__).resolve().parents[3]
-_HOST_DCD_DIR = REPO_ROOT / "tools" / "host" / "dcd"
+
-FLASHLOADER_BIN = _HOST_DCD_DIR / "ivt_flashloader.bin"
+
-REAL_DCD_BIN = _HOST_DCD_DIR / "dcd.bin"
+def _host_dcd_dir() -> Path:
+    """Каталог с data-блобами (dcd.bin, ivt_flashloader.bin, *_fdcb.bin) —
+    двухрежимный резолв (Р6), симметричный firmware_hab_path() (Фаза 5).
+
+    Dev: tools/host/dcd/ (единый источник, использует и flash_usb.py).
+    Frozen: sys._MEIPASS/data — см. service_tui.spec, который кладёт эти
+    же файлы в 'data/' внутри бандла (для onedir _MEIPASS == _internal/).
+    """
+    if getattr(sys, "frozen", False):
+        return Path(sys._MEIPASS) / "data"
+    return REPO_ROOT / "tools" / "host" / "dcd"
+
+
+def flashloader_bin_path() -> Path:
+    """Путь к ivt_flashloader.bin (двухрежимный резолв, см. _host_dcd_dir)."""
+    return _host_dcd_dir() / "ivt_flashloader.bin"
+
+
+def real_dcd_bin_path() -> Path:
+    """Путь к dcd.bin (двухрежимный резолв, см. _host_dcd_dir)."""
+    return _host_dcd_dir() / "dcd.bin"
 
 
 def fcb_blob_path(fcb_filename: str) -> Path:
     """Путь к готовому FCB-блобу (tools/host/dcd/w25q128_fdcb.bin и т.п.)."""
-    return _HOST_DCD_DIR / fcb_filename
+    return _host_dcd_dir() / fcb_filename
 
 
 def firmware_hab_path(firmware: str, build_type: str) -> Path:
@@ -269,8 +289,9 @@ def load_flashloader(
         raise DeviceNotFoundError(
             f"SDP-устройство не найдено ({_SDP_DEVICE_ID}). Плата в BootROM-режиме?"
         )
-    if not FLASHLOADER_BIN.exists():
+    flashloader_bin = flashloader_bin_path()
-        raise FlashBackendError(f"Не найден: {FLASHLOADER_BIN}")
+    if not flashloader_bin.exists():
+        raise FlashBackendError(f"Не найден: {flashloader_bin}")
 
     _emit(
         progress_cb,
@@ -278,7 +299,7 @@ def load_flashloader(
         0,
         f"Загрузка Flashloader через SDP ({_SDP_DEVICE_ID})",
     )
-    data = FLASHLOADER_BIN.read_bytes()
+    data = flashloader_bin.read_bytes()
     try:
         with SDP(sdp_devices[0]) as sdp:
             sdp.write_file(FLASHLOADER_LOAD_ADDR, data)
@@ -491,7 +512,7 @@ def build_custom_hab(
     """
     _emit(progress_cb, "hab_build", 0, "Сборка HAB-образа (HabImage)")
 
-    dcd_bin = REAL_DCD_BIN if use_dcd else None
+    dcd_bin = real_dcd_bin_path() if use_dcd else None
     if use_dcd and not dcd_bin.exists():
         raise HabBuildError(f"DCD запрошен, но файл не найден: {dcd_bin}")
 

tools/production/app/screens/flash.py

@@ -93,6 +93,7 @@ class FlashScreen(Screen, ConnectionWatcherMixin):
         self._flashing = False
         self._preset = preset or FlashPreset()
         self._last_error_message: Optional[str] = None
+        self._write_log_bucket: int = -1  # см. _on_progress (Р11)
 
     def compose(self) -> ComposeResult:
         with AppFrame(id="flash-frame"):
@@ -237,6 +238,7 @@ class FlashScreen(Screen, ConnectionWatcherMixin):
         self, target: FlashTarget, bin_path: Optional[Path], preset: FlashPreset
     ) -> None:
         self._last_error_message = None
+        self._write_log_bucket = -1
         self._set_busy(True)
         self._show_progress(True)
         self._log(f"▶ Прошивка: {target.value}")
@@ -320,6 +322,17 @@ class FlashScreen(Screen, ConnectionWatcherMixin):
     async def _on_progress(self, progress: FlashProgress) -> None:
         bar = self.query_one("#flash-progress-bar", ProgressBar)
         bar.update(total=100, progress=progress.percent)
+
+        if progress.phase == "write":
+            # Р11: без троттлинга запись HAB-образа даёт ~135 строк в лог
+            # (progress_callback spsdk дёргается на каждый пакет). Бар выше
+            # обновляется на КАЖДОМ событии — плавность не теряется,
+            # троттлинг только для #flash-log и только для фазы "write".
+            bucket = min(progress.percent // 10, 10)
+            if bucket == self._write_log_bucket:
+                return
+            self._write_log_bucket = bucket
+
         self._log(progress.message)
         if progress.phase == "error":
             self._last_error_message = progress.message

tools/production/app/screens/waiting.py

@@ -18,14 +18,14 @@ import logging
 import tomllib
 from pathlib import Path
 from typing import Optional
-
+from textual import on
 from textual.app import ComposeResult
-from textual.containers import Center
+from textual.containers import Center, Horizontal
 from textual.css.query import NoMatches
 from textual.message import Message
 from textual.screen import Screen
 from textual.timer import Timer
-from textual.widgets import Static
+from textual.widgets import Button, Static
 
 from ..boot_art import LOGO_ART
 from ..flasher import Flasher
@@ -92,6 +92,10 @@ class WaitingScreen(Screen):
             yield Static("", id="waiting-reason", classes="hidden")
             yield Static("Подключите плату индикатора к USB...", id="waiting-hint")
             yield Static(_SPINNER_FRAMES[0], id="waiting-spinner")
+            with Horizontal(id="waiting-btn-row"):
+                yield Button(
+                    "✕ Выйти из приложения", id="waiting-btn-quit", variant="default"
+                )
 
     def on_mount(self) -> None:
         self._detect_timer = self.set_interval(_DETECT_INTERVAL_S, self._poll_usb)
@@ -102,6 +106,12 @@ class WaitingScreen(Screen):
     def on_unmount(self) -> None:
         self._stop_timers()
 
+    # ── Обработчики ───────────────────────────────────────────────────────────
+
+    @on(Button.Pressed, "#waiting-btn-quit")
+    def _on_quit_pressed(self) -> None:
+        self.app.exit()
+
     # ── Internal ──────────────────────────────────────────────────────────────
 
     def _show_reason(self, reason: str) -> None:

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/Python

@@ -0,0 +1 @@
+Python.framework/Versions/3.14/Python

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/Python.framework/Python

@@ -0,0 +1 @@
+Versions/Current/Python

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/Python.framework/Resources

@@ -0,0 +1 @@
+Versions/Current/Resources

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/Python.framework/Versions/3.14/Resources/Info.plist

@@ -0,0 +1,32 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!DOCTYPE plist PUBLIC "-//Apple//DTD PLIST 1.0//EN" "http://www.apple.com/DTDs/PropertyList-1.0.dtd">
+<plist version="1.0">
+<dict>
+	<key>CFBundleName</key>
+	<string>Python</string>
+	<key>CFBundleIdentifier</key>
+	<string>org.python.python</string>
+	<key>CFBundleVersion</key>
+	<string>3.14.6</string>
+	<key>CFBundlePackageType</key>
+	<string>FMWK</string>
+	<key>CFBundleSignature</key>
+	<string>????</string>
+	<key>CFBundleExecutable</key>
+	<string>Python</string>
+	<key>CFBundleInfoDictionaryVersion</key>
+	<string>6.0</string>
+	<key>CFBundleShortVersionString</key>
+	<string>3.14.6</string>
+	<key>CFBundleSupportedPlatforms</key>
+	<array>
+		<string>MacOSX</string>
+	</array>
+	<key>NSHumanReadableCopyright</key>
+	<string>Copyright © 2001 Python Software Foundation. All rights reserved.</string>
+	<key>CFBundleDevelopmentRegion</key>
+	<string>English</string>
+	<key>CFBundleAllowMixedLocalizations</key>
+	<true/>
+</dict>
+</plist>

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/Python.framework/Versions/Current

@@ -0,0 +1 @@
+3.14

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/app/app.tcss

@@ -0,0 +1,391 @@
+/* ═══════════════════════════════════════════════════════════
+   service-tui — единый файл стилей
+   Путь резолвится относительно app/app.py → app/app.tcss
+   ═══════════════════════════════════════════════════════════ */
+
+/* ── Общая рамка приложения (AppFrame) ──────────────────── */
+/* Все три экрана центрируют один AppFrame фиксированного    */
+/* размера — единообразный визуальный каркас независимо от   */
+/* размера окна терминала (как в ratatui-приложениях).       */
+
+Screen {
+    align: center middle;
+}
+
+AppFrame {
+    width: 100%;
+    height: 100%;
+    max-width: 112;
+    max-height: 40;
+    border: heavy $primary;
+    background: $surface;
+    padding: 1 2;
+}
+
+/* ── WaitingScreen ──────────────────────────────────────── */
+
+#waiting-frame {
+    align: center top;
+}
+
+#waiting-logo-row {
+    width: 100%;
+    height: auto;
+    margin-top: 1;
+}
+
+#waiting-logo-art {
+    width: auto;
+}
+
+#waiting-version-row {
+    width: 100%;
+    height: auto;
+    margin-top: 1;
+}
+
+#waiting-version {
+    color: $warning;
+    text-style: bold;
+    text-align: center;
+    margin-bottom: 1;
+}
+#waiting-reason {
+    margin-top: 1;
+    padding: 1 2;
+    border: round $warning;
+    color: $warning;
+    text-style: bold;
+    content-align: center middle;
+}
+
+#waiting-reason.hidden {
+    display: none;
+}
+
+#waiting-hint {
+    margin-top: 2;
+    color: $text-muted;
+    content-align: center middle;
+}
+
+#waiting-spinner {
+    margin-top: 1;
+    color: $accent;
+    content-align: center middle;
+}
+
+/* ── FlashScreen ────────────────────────────────────────── */
+
+#flash-title {
+    text-style: bold;
+    color: $warning;
+    margin-bottom: 1;
+}
+
+#flash-target-group {
+    border: round $panel;
+    padding: 1 2;
+    margin-bottom: 1;
+    height: auto;
+    max-height: 18;
+    overflow-y: auto;
+}
+
+#flash-target-group .section-title {
+    text-style: bold;
+    color: $text-muted;
+    padding: 0 0 1 0;
+}
+
+#flash-custom-group {
+    margin-top: 1;
+    height: auto;
+}
+
+#flash-custom-group.hidden {
+    display: none;
+}
+
+#flash-custom-select,
+#flash-fcb-select {
+    width: 1fr;
+    margin-bottom: 1;
+}
+
+#flash-dcd-row {
+    height: auto;
+    align: left middle;
+    margin-top: 1;
+}
+
+#flash-dcd-switch {
+    margin-right: 1;
+}
+
+#flash-btn-row {
+    height: auto;
+    margin-top: 1;
+    align: left middle;
+}
+
+#flash-btn-flash,
+#flash-btn-erase {
+    margin-right: 2;
+}
+
+#flash-btn-flash:disabled,
+#flash-btn-erase:disabled,
+#flash-btn-quit:disabled {
+    background: $panel;
+    color: $text-muted;
+}
+
+#flash-progress-bar {
+    margin-top: 1;
+}
+
+#flash-progress-bar.hidden {
+    display: none;
+}
+
+#flash-log {
+    height: 1fr;
+    min-height: 6;
+    margin-top: 1;
+    border: round $panel;
+    background: $surface-darken-1;
+    overflow-y: auto;
+}
+
+/* ── PostFlashScreen ────────────────────────────────────── */
+
+#post-flash-frame {
+    align: center middle;
+}
+
+#post-flash-title {
+    text-style: bold;
+    color: $success;
+    content-align: center middle;
+    margin-bottom: 2;
+}
+
+#post-flash-instruction {
+    border: round $warning;
+    padding: 1 3;
+    color: $text;
+    text-style: bold;
+    content-align: center middle;
+    width: auto;
+}
+
+#post-flash-countdown {
+    margin-top: 2;
+    color: $text-muted;
+    content-align: center middle;
+}
+
+#post-flash-btn-row {
+    margin-top: 2;
+    height: auto;
+    align: center middle;
+}
+
+#post-flash-btn-ok {
+    margin-right: 2;
+}
+
+#post-flash-title-row,
+#post-flash-instruction-row {
+    width: 100%;
+    height: auto;
+}
+/* ── DiagScreen ─────────────────────────────────────────── */
+
+#diag-frame {
+    layout: vertical;
+    padding: 0;
+}
+
+#diag-header {
+    height: 3;
+    background: $panel;
+    padding: 0 2;
+    align: left middle;
+}
+
+#diag-header-fw {
+    width: auto;
+    min-width: 14;
+    color: $text-muted;
+    margin-right: 3;
+}
+
+#diag-header-uid {
+    width: auto;
+    min-width: 28;
+    color: $text-muted;
+    margin-right: 3;
+}
+
+#diag-header-m5 {
+    width: auto;
+    color: $success;
+}
+
+#diag-header-m5.m5-absent {
+    color: $text-muted;
+}
+
+#diag-main {
+    height: 1fr;
+    min-height: 10;
+}
+
+#diag-progress-row {
+    height: auto;
+    padding: 0 2;
+}
+
+#diag-progress-row.hidden {
+    display: none;
+}
+
+#diag-progress-bar {
+    height: 1;
+    margin-top: 1;
+}
+
+#diag-progress-label {
+    height: 1;
+    color: $text-muted;
+}
+
+#diag-btn-row {
+    height: 3;
+    align: left middle;
+    padding: 0 2;
+    background: $panel;
+}
+
+#diag-btn-run-selected,
+#diag-btn-run-all {
+    margin-right: 2;
+}
+
+#diag-btn-run-selected:disabled,
+#diag-btn-run-all:disabled {
+    background: $panel;
+    color: $text-muted;
+}
+
+/* ── TestListPanel ──────────────────────────────────────── */
+
+TestListPanel {
+    width: 38;
+    border-right: solid $panel;
+    padding: 1 1;
+    overflow-y: auto;
+}
+
+TestListPanel .section-title {
+    text-style: bold;
+    color: $text-muted;
+    padding: 0 0 1 0;
+}
+
+#test-list-select-row {
+    height: auto;
+    margin-bottom: 1;
+}
+
+#test-list-select-row Button {
+    margin-right: 1;
+    min-width: 12;
+}
+
+.test-row {
+    height: auto;
+    align: left middle;
+}
+
+.test-row-hil-badge {
+    width: 6;
+    color: $accent;
+}
+
+.test-row-hil-badge.hil-disabled {
+    color: $text-muted;
+}
+
+/* ── ResultsPanel ───────────────────────────────────────── */
+
+ResultsPanel {
+    width: 70;
+    padding: 1 2;
+    overflow-y: auto;
+}
+
+ResultsPanel .section-title {
+    text-style: bold;
+    color: $text-muted;
+    padding: 0 0 1 0;
+}
+
+#results-empty {
+    height: 1fr;
+    width: 100%;
+}
+
+#results-empty.hidden {
+    display: none;
+}
+
+#results-empty-text {
+    color: $text-muted;
+    text-align: center;
+}
+
+#results-table {
+    height: auto;
+    max-height: 100%;
+}
+
+#results-table.hidden {
+    display: none;
+}
+
+/* ── ConfirmPanel ───────────────────────────────────────── */
+
+ConfirmPanel {
+    height: auto;
+    background: $warning 15%;
+    border-top: solid $warning;
+    padding: 1 2;
+    align: left middle;
+}
+
+ConfirmPanel.hidden {
+    display: none;
+}
+
+#confirm-prompt {
+    width: 1fr;
+    color: $warning;
+    text-style: bold;
+}
+
+#confirm-countdown {
+    color: $text-muted;
+    margin-right: 2;
+}
+
+#confirm-btn-ok {
+    margin-right: 1;
+}
+
+#confirm-btn-ok.hidden,
+#confirm-btn-fail.hidden {
+    display: none;
+}

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/click-8.4.2.dist-info/INSTALLER

@@ -0,0 +1 @@
+uv

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/click-8.4.2.dist-info/METADATA

@@ -0,0 +1,84 @@
+Metadata-Version: 2.4
+Name: click
+Version: 8.4.2
+Summary: Composable command line interface toolkit
+Maintainer-email: Pallets <contact@palletsprojects.com>
+Requires-Python: >=3.10
+Description-Content-Type: text/markdown
+License-Expression: BSD-3-Clause
+Classifier: Development Status :: 5 - Production/Stable
+Classifier: Intended Audience :: Developers
+Classifier: Operating System :: OS Independent
+Classifier: Programming Language :: Python
+Classifier: Typing :: Typed
+License-File: LICENSE.txt
+Requires-Dist: colorama; platform_system == 'Windows'
+Project-URL: Changes, https://click.palletsprojects.com/page/changes/
+Project-URL: Chat, https://discord.gg/pallets
+Project-URL: Documentation, https://click.palletsprojects.com/
+Project-URL: Donate, https://palletsprojects.com/donate
+Project-URL: Source, https://github.com/pallets/click/
+
+<div align="center"><img src="https://raw.githubusercontent.com/pallets/click/refs/heads/stable/docs/_static/click-name.svg" alt="" height="150"></div>
+
+# Click
+
+Click is a Python package for creating beautiful command line interfaces
+in a composable way with as little code as necessary. It's the "Command
+Line Interface Creation Kit". It's highly configurable but comes with
+sensible defaults out of the box.
+
+It aims to make the process of writing command line tools quick and fun
+while also preventing any frustration caused by the inability to
+implement an intended CLI API.
+
+Click in three points:
+
+-   Arbitrary nesting of commands
+-   Automatic help page generation
+-   Supports lazy loading of subcommands at runtime
+
+
+## A Simple Example
+
+```python
+import click
+
+@click.command()
+@click.option("--count", default=1, help="Number of greetings.")
+@click.option("--name", prompt="Your name", help="The person to greet.")
+def hello(count, name):
+    """Simple program that greets NAME for a total of COUNT times."""
+    for _ in range(count):
+        click.echo(f"Hello, {name}!")
+
+if __name__ == '__main__':
+    hello()
+```
+
+```
+$ python hello.py --count=3
+Your name: Click
+Hello, Click!
+Hello, Click!
+Hello, Click!
+```
+
+
+## Donate
+
+The Pallets organization develops and supports Click and other popular
+packages. In order to grow the community of contributors and users, and
+allow the maintainers to devote more time to the projects, [please
+donate today][].
+
+[please donate today]: https://palletsprojects.com/donate
+
+## Contributing
+
+See our [detailed contributing documentation][contrib] for many ways to
+contribute, including reporting issues, requesting features, asking or answering
+questions, and making PRs.
+
+[contrib]: https://palletsprojects.com/contributing/
+

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/click-8.4.2.dist-info/RECORD

@@ -0,0 +1,24 @@
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+Copyright 2014 Pallets
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are
+met:
+
+1.  Redistributions of source code must retain the above copyright
+    notice, this list of conditions and the following disclaimer.
+
+2.  Redistributions in binary form must reproduce the above copyright
+    notice, this list of conditions and the following disclaimer in the
+    documentation and/or other materials provided with the distribution.
+
+3.  Neither the name of the copyright holder nor the names of its
+    contributors may be used to endorse or promote products derived from
+    this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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+Metadata-Version: 2.4
+Name: cryptography
+Version: 46.0.7
+Classifier: Development Status :: 5 - Production/Stable
+Classifier: Intended Audience :: Developers
+Classifier: Natural Language :: English
+Classifier: Operating System :: MacOS :: MacOS X
+Classifier: Operating System :: POSIX
+Classifier: Operating System :: POSIX :: BSD
+Classifier: Operating System :: POSIX :: Linux
+Classifier: Operating System :: Microsoft :: Windows
+Classifier: Programming Language :: Python
+Classifier: Programming Language :: Python :: 3
+Classifier: Programming Language :: Python :: 3 :: Only
+Classifier: Programming Language :: Python :: 3.8
+Classifier: Programming Language :: Python :: 3.9
+Classifier: Programming Language :: Python :: 3.10
+Classifier: Programming Language :: Python :: 3.11
+Classifier: Programming Language :: Python :: 3.12
+Classifier: Programming Language :: Python :: 3.13
+Classifier: Programming Language :: Python :: 3.14
+Classifier: Programming Language :: Python :: Implementation :: CPython
+Classifier: Programming Language :: Python :: Implementation :: PyPy
+Classifier: Programming Language :: Python :: Free Threading :: 3 - Stable
+Classifier: Topic :: Security :: Cryptography
+Requires-Dist: cffi>=1.14 ; python_full_version == '3.8.*' and platform_python_implementation != 'PyPy'
+Requires-Dist: cffi>=2.0.0 ; python_full_version >= '3.9' and platform_python_implementation != 'PyPy'
+Requires-Dist: typing-extensions>=4.13.2 ; python_full_version < '3.11'
+Requires-Dist: bcrypt>=3.1.5 ; extra == 'ssh'
+Requires-Dist: nox[uv]>=2024.4.15 ; extra == 'nox'
+Requires-Dist: cryptography-vectors==46.0.7 ; extra == 'test'
+Requires-Dist: pytest>=7.4.0 ; extra == 'test'
+Requires-Dist: pytest-benchmark>=4.0 ; extra == 'test'
+Requires-Dist: pytest-cov>=2.10.1 ; extra == 'test'
+Requires-Dist: pytest-xdist>=3.5.0 ; extra == 'test'
+Requires-Dist: pretend>=0.7 ; extra == 'test'
+Requires-Dist: certifi>=2024 ; extra == 'test'
+Requires-Dist: pytest-randomly ; extra == 'test-randomorder'
+Requires-Dist: sphinx>=5.3.0 ; extra == 'docs'
+Requires-Dist: sphinx-rtd-theme>=3.0.0 ; extra == 'docs'
+Requires-Dist: sphinx-inline-tabs ; extra == 'docs'
+Requires-Dist: pyenchant>=3 ; extra == 'docstest'
+Requires-Dist: readme-renderer>=30.0 ; extra == 'docstest'
+Requires-Dist: sphinxcontrib-spelling>=7.3.1 ; extra == 'docstest'
+Requires-Dist: build>=1.0.0 ; extra == 'sdist'
+Requires-Dist: ruff>=0.11.11 ; extra == 'pep8test'
+Requires-Dist: mypy>=1.14 ; extra == 'pep8test'
+Requires-Dist: check-sdist ; extra == 'pep8test'
+Requires-Dist: click>=8.0.1 ; extra == 'pep8test'
+Provides-Extra: ssh
+Provides-Extra: nox
+Provides-Extra: test
+Provides-Extra: test-randomorder
+Provides-Extra: docs
+Provides-Extra: docstest
+Provides-Extra: sdist
+Provides-Extra: pep8test
+License-File: LICENSE
+License-File: LICENSE.APACHE
+License-File: LICENSE.BSD
+Summary: cryptography is a package which provides cryptographic recipes and primitives to Python developers.
+Author-email: The Python Cryptographic Authority and individual contributors <cryptography-dev@python.org>
+License-Expression: Apache-2.0 OR BSD-3-Clause
+Requires-Python: >=3.8, !=3.9.0, !=3.9.1
+Description-Content-Type: text/x-rst; charset=UTF-8
+Project-URL: homepage, https://github.com/pyca/cryptography
+Project-URL: documentation, https://cryptography.io/
+Project-URL: source, https://github.com/pyca/cryptography/
+Project-URL: issues, https://github.com/pyca/cryptography/issues
+Project-URL: changelog, https://cryptography.io/en/latest/changelog/
+
+pyca/cryptography
+=================
+
+.. image:: https://img.shields.io/pypi/v/cryptography.svg
+    :target: https://pypi.org/project/cryptography/
+    :alt: Latest Version
+
+.. image:: https://readthedocs.org/projects/cryptography/badge/?version=latest
+    :target: https://cryptography.io
+    :alt: Latest Docs
+
+.. image:: https://github.com/pyca/cryptography/actions/workflows/ci.yml/badge.svg
+    :target: https://github.com/pyca/cryptography/actions/workflows/ci.yml?query=branch%3Amain
+
+``cryptography`` is a package which provides cryptographic recipes and
+primitives to Python developers. Our goal is for it to be your "cryptographic
+standard library". It supports Python 3.8+ and PyPy3 7.3.11+.
+
+``cryptography`` includes both high level recipes and low level interfaces to
+common cryptographic algorithms such as symmetric ciphers, message digests, and
+key derivation functions. For example, to encrypt something with
+``cryptography``'s high level symmetric encryption recipe:
+
+.. code-block:: pycon
+
+    >>> from cryptography.fernet import Fernet
+    >>> # Put this somewhere safe!
+    >>> key = Fernet.generate_key()
+    >>> f = Fernet(key)
+    >>> token = f.encrypt(b"A really secret message. Not for prying eyes.")
+    >>> token
+    b'...'
+    >>> f.decrypt(token)
+    b'A really secret message. Not for prying eyes.'
+
+You can find more information in the `documentation`_.
+
+You can install ``cryptography`` with:
+
+.. code-block:: console
+
+    $ pip install cryptography
+
+For full details see `the installation documentation`_.
+
+Discussion
+~~~~~~~~~~
+
+If you run into bugs, you can file them in our `issue tracker`_.
+
+We maintain a `cryptography-dev`_ mailing list for development discussion.
+
+You can also join ``#pyca`` on ``irc.libera.chat`` to ask questions or get
+involved.
+
+Security
+~~~~~~~~
+
+Need to report a security issue? Please consult our `security reporting`_
+documentation.
+
+
+.. _`documentation`: https://cryptography.io/
+.. _`the installation documentation`: https://cryptography.io/en/latest/installation/
+.. _`issue tracker`: https://github.com/pyca/cryptography/issues
+.. _`cryptography-dev`: https://mail.python.org/mailman/listinfo/cryptography-dev
+.. _`security reporting`: https://cryptography.io/en/latest/security/
+

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tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/cryptography-46.0.7.dist-info/licenses/LICENSE

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+This software is made available under the terms of *either* of the licenses
+found in LICENSE.APACHE or LICENSE.BSD. Contributions to cryptography are made
+under the terms of *both* these licenses.

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tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/cryptography-46.0.7.dist-info/licenses/LICENSE.BSD

@@ -0,0 +1,27 @@
+Copyright (c) Individual contributors.
+All rights reserved.
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+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
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+Metadata-Version: 2.4
+Name: importlib_metadata
+Version: 8.9.0
+Summary: Read metadata from Python packages
+Author-email: "Jason R. Coombs" <jaraco@jaraco.com>
+License-Expression: Apache-2.0
+Project-URL: Source, https://github.com/python/importlib_metadata
+Classifier: Development Status :: 5 - Production/Stable
+Classifier: Intended Audience :: Developers
+Classifier: Programming Language :: Python :: 3
+Classifier: Programming Language :: Python :: 3 :: Only
+Requires-Python: >=3.10
+Description-Content-Type: text/x-rst
+License-File: LICENSE
+Requires-Dist: zipp>=3.20
+Provides-Extra: test
+Requires-Dist: pytest!=8.1.*,>=6; extra == "test"
+Requires-Dist: packaging; extra == "test"
+Requires-Dist: pyfakefs; extra == "test"
+Requires-Dist: pytest-perf>=0.9.2; extra == "test"
+Provides-Extra: doc
+Requires-Dist: sphinx>=3.5; extra == "doc"
+Requires-Dist: jaraco.packaging>=9.3; extra == "doc"
+Requires-Dist: rst.linker>=1.9; extra == "doc"
+Requires-Dist: furo; extra == "doc"
+Requires-Dist: sphinx-lint; extra == "doc"
+Requires-Dist: jaraco.tidelift>=1.4; extra == "doc"
+Provides-Extra: perf
+Requires-Dist: ipython; extra == "perf"
+Provides-Extra: check
+Requires-Dist: pytest-checkdocs>=2.14; extra == "check"
+Requires-Dist: pytest-ruff>=0.2.1; sys_platform != "cygwin" and extra == "check"
+Provides-Extra: cover
+Requires-Dist: pytest-cov; extra == "cover"
+Provides-Extra: enabler
+Requires-Dist: pytest-enabler>=3.4; extra == "enabler"
+Provides-Extra: type
+Requires-Dist: pytest-mypy>=1.0.1; platform_python_implementation != "PyPy" and extra == "type"
+Dynamic: license-file
+
+.. image:: https://img.shields.io/pypi/v/importlib_metadata.svg
+   :target: https://pypi.org/project/importlib_metadata
+
+.. image:: https://img.shields.io/pypi/pyversions/importlib_metadata.svg
+
+.. image:: https://github.com/python/importlib_metadata/actions/workflows/main.yml/badge.svg
+   :target: https://github.com/python/importlib_metadata/actions?query=workflow%3A%22tests%22
+   :alt: tests
+
+.. image:: https://img.shields.io/endpoint?url=https://raw.githubusercontent.com/astral-sh/ruff/main/assets/badge/v2.json
+    :target: https://github.com/astral-sh/ruff
+    :alt: Ruff
+
+.. image:: https://readthedocs.org/projects/importlib-metadata/badge/?version=latest
+   :target: https://importlib-metadata.readthedocs.io/en/latest/?badge=latest
+
+.. image:: https://img.shields.io/badge/skeleton-2025-informational
+   :target: https://blog.jaraco.com/skeleton
+
+.. image:: https://tidelift.com/badges/package/pypi/importlib-metadata
+   :target: https://tidelift.com/subscription/pkg/pypi-importlib-metadata?utm_source=pypi-importlib-metadata&utm_medium=readme
+
+Library to access the metadata for a Python package.
+
+This package supplies third-party access to the functionality of
+`importlib.metadata <https://docs.python.org/3/library/importlib.metadata.html>`_
+including improvements added to subsequent Python versions.
+
+
+Compatibility
+=============
+
+New features are introduced in this third-party library and later merged
+into CPython. The following table indicates which versions of this library
+were contributed to different versions in the standard library:
+
+.. list-table::
+   :header-rows: 1
+
+   * - importlib_metadata
+     - stdlib
+   * - 7.0
+     - 3.13
+   * - 6.5
+     - 3.12
+   * - 4.13
+     - 3.11
+   * - 4.6
+     - 3.10
+   * - 1.4
+     - 3.8
+
+
+Usage
+=====
+
+See the `online documentation <https://importlib-metadata.readthedocs.io/>`_
+for usage details.
+
+`Finder authors
+<https://docs.python.org/3/reference/import.html#finders-and-loaders>`_ can
+also add support for custom package installers.  See the above documentation
+for details.
+
+
+Caveats
+=======
+
+This project primarily supports third-party packages installed by PyPA
+tools (or other conforming packages). It does not support:
+
+- Packages in the stdlib.
+- Packages installed without metadata.
+
+Project details
+===============
+
+ * Project home: https://github.com/python/importlib_metadata
+ * Report bugs at: https://github.com/python/importlib_metadata/issues
+ * Code hosting: https://github.com/python/importlib_metadata
+ * Documentation: https://importlib-metadata.readthedocs.io/
+
+For Enterprise
+==============
+
+Available as part of the Tidelift Subscription.
+
+This project and the maintainers of thousands of other packages are working with Tidelift to deliver one enterprise subscription that covers all of the open source you use.
+
+`Learn more <https://tidelift.com/subscription/pkg/pypi-importlib-metadata?utm_source=pypi-importlib-metadata&utm_medium=referral&utm_campaign=github>`_.

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tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/importlib_metadata-8.9.0.dist-info/WHEEL

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+Root-Is-Purelib: true
+Tag: py3-none-any
+

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/importlib_metadata-8.9.0.dist-info/licenses/LICENSE

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+Apache License
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tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/importlib_metadata-8.9.0.dist-info/top_level.txt

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+importlib_metadata

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/pyproject.toml

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+[project]
+name = "service-tui"
+version = "0.2.0"
+description = "TUI сервисного инженера для диагностики платы MIMXRT1052"
+requires-python = ">=3.11"
+dependencies = [
+    "textual>=0.80.0",
+    "pyserial>=3.5",
+    "python-dotenv>=1.0.0",
+    "pyinstaller>=6.0.0",
+    "pyusb>=1.0.0",
+    "spsdk==3.7.0",
+]
+
+[project.scripts]
+service-tui = "main:main"
+
+[tool.uv]
+package = false
+
+[dependency-groups]
+dev = ["pytest>=8.0.0"]
+
+[build-system]
+requires = ["hatchling"]
+build-backend = "hatchling.build"

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/setuptools-80.10.2.dist-info/INSTALLER

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+uv

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/setuptools-80.10.2.dist-info/METADATA

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+Metadata-Version: 2.4
+Name: setuptools
+Version: 80.10.2
+Summary: Easily download, build, install, upgrade, and uninstall Python packages
+Author-email: Python Packaging Authority <distutils-sig@python.org>
+License-Expression: MIT
+Project-URL: Source, https://github.com/pypa/setuptools
+Project-URL: Documentation, https://setuptools.pypa.io/
+Project-URL: Changelog, https://setuptools.pypa.io/en/stable/history.html
+Keywords: CPAN PyPI distutils eggs package management
+Classifier: Development Status :: 5 - Production/Stable
+Classifier: Intended Audience :: Developers
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+Classifier: Programming Language :: Python :: 3 :: Only
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+Classifier: Topic :: System :: Archiving :: Packaging
+Classifier: Topic :: System :: Systems Administration
+Classifier: Topic :: Utilities
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+Requires-Dist: jaraco.functools>=4; extra == "core"
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+Requires-Dist: ruff>=0.8.0; sys_platform != "cygwin" and extra == "check"
+Provides-Extra: cover
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+Requires-Dist: jaraco.develop>=7.21; sys_platform != "cygwin" and extra == "type"
+Dynamic: license-file
+
+.. |pypi-version| image:: https://img.shields.io/pypi/v/setuptools.svg
+   :target: https://pypi.org/project/setuptools
+
+.. |py-version| image:: https://img.shields.io/pypi/pyversions/setuptools.svg
+
+.. |test-badge| image:: https://github.com/pypa/setuptools/actions/workflows/main.yml/badge.svg
+   :target: https://github.com/pypa/setuptools/actions?query=workflow%3A%22tests%22
+   :alt: tests
+
+.. |ruff-badge| image:: https://img.shields.io/endpoint?url=https://raw.githubusercontent.com/charliermarsh/ruff/main/assets/badge/v2.json
+   :target: https://github.com/astral-sh/ruff
+   :alt: Ruff
+
+.. |docs-badge| image:: https://img.shields.io/readthedocs/setuptools/latest.svg
+   :target: https://setuptools.pypa.io
+
+.. |skeleton-badge| image:: https://img.shields.io/badge/skeleton-2025-informational
+   :target: https://blog.jaraco.com/skeleton
+
+.. |codecov-badge| image:: https://img.shields.io/codecov/c/github/pypa/setuptools/master.svg?logo=codecov&logoColor=white
+   :target: https://codecov.io/gh/pypa/setuptools
+
+.. |tidelift-badge| image:: https://tidelift.com/badges/github/pypa/setuptools?style=flat
+   :target: https://tidelift.com/subscription/pkg/pypi-setuptools?utm_source=pypi-setuptools&utm_medium=readme
+
+.. |discord-badge| image:: https://img.shields.io/discord/803025117553754132
+   :target: https://discord.com/channels/803025117553754132/815945031150993468
+   :alt: Discord
+
+|pypi-version| |py-version| |test-badge| |ruff-badge| |docs-badge| |skeleton-badge| |codecov-badge| |discord-badge|
+
+See the `Quickstart <https://setuptools.pypa.io/en/latest/userguide/quickstart.html>`_
+and the `User's Guide <https://setuptools.pypa.io/en/latest/userguide/>`_ for
+instructions on how to use Setuptools.
+
+Questions and comments should be directed to `GitHub Discussions
+<https://github.com/pypa/setuptools/discussions>`_.
+Bug reports and especially tested patches may be
+submitted directly to the `bug tracker
+<https://github.com/pypa/setuptools/issues>`_.
+
+
+Code of Conduct
+===============
+
+Everyone interacting in the setuptools project's codebases, issue trackers,
+chat rooms, and fora is expected to follow the
+`PSF Code of Conduct <https://github.com/pypa/.github/blob/main/CODE_OF_CONDUCT.md>`_.
+
+
+For Enterprise
+==============
+
+Available as part of the Tidelift Subscription.
+
+Setuptools and the maintainers of thousands of other packages are working with Tidelift to deliver one enterprise subscription that covers all of the open source you use.
+
+`Learn more <https://tidelift.com/subscription/pkg/pypi-setuptools?utm_source=pypi-setuptools&utm_medium=referral&utm_campaign=github>`_.

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+setuptools/warnings.py,sha256=oY0Se5eOqje_FEyjTgonUc0XGwgsrI5cgm1kkwulz_w,3796
+setuptools/wheel.py,sha256=iI-LSDrgHMlJIzQMALVlJRq3Qesgbj7xa6hWZYJyZl4,9532
+setuptools/windows_support.py,sha256=wW4IYLM1Bv7Z1MaauP2xmPjyy-wkmQnXdyvXscAf9fw,726

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/setuptools-80.10.2.dist-info/WHEEL

@@ -0,0 +1,5 @@
+Wheel-Version: 1.0
+Generator: setuptools (80.10.2)
+Root-Is-Purelib: true
+Tag: py3-none-any
+

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/setuptools-80.10.2.dist-info/entry_points.txt

@@ -0,0 +1,51 @@
+[distutils.commands]
+alias = setuptools.command.alias:alias
+bdist_egg = setuptools.command.bdist_egg:bdist_egg
+bdist_rpm = setuptools.command.bdist_rpm:bdist_rpm
+bdist_wheel = setuptools.command.bdist_wheel:bdist_wheel
+build = setuptools.command.build:build
+build_clib = setuptools.command.build_clib:build_clib
+build_ext = setuptools.command.build_ext:build_ext
+build_py = setuptools.command.build_py:build_py
+develop = setuptools.command.develop:develop
+dist_info = setuptools.command.dist_info:dist_info
+easy_install = setuptools.command.easy_install:easy_install
+editable_wheel = setuptools.command.editable_wheel:editable_wheel
+egg_info = setuptools.command.egg_info:egg_info
+install = setuptools.command.install:install
+install_egg_info = setuptools.command.install_egg_info:install_egg_info
+install_lib = setuptools.command.install_lib:install_lib
+install_scripts = setuptools.command.install_scripts:install_scripts
+rotate = setuptools.command.rotate:rotate
+saveopts = setuptools.command.saveopts:saveopts
+sdist = setuptools.command.sdist:sdist
+setopt = setuptools.command.setopt:setopt
+
+[distutils.setup_keywords]
+dependency_links = setuptools.dist:assert_string_list
+eager_resources = setuptools.dist:assert_string_list
+entry_points = setuptools.dist:check_entry_points
+exclude_package_data = setuptools.dist:check_package_data
+extras_require = setuptools.dist:check_extras
+include_package_data = setuptools.dist:assert_bool
+install_requires = setuptools.dist:check_requirements
+namespace_packages = setuptools.dist:check_nsp
+package_data = setuptools.dist:check_package_data
+packages = setuptools.dist:check_packages
+python_requires = setuptools.dist:check_specifier
+setup_requires = setuptools.dist:check_requirements
+use_2to3 = setuptools.dist:invalid_unless_false
+zip_safe = setuptools.dist:assert_bool
+
+[egg_info.writers]
+PKG-INFO = setuptools.command.egg_info:write_pkg_info
+dependency_links.txt = setuptools.command.egg_info:overwrite_arg
+eager_resources.txt = setuptools.command.egg_info:overwrite_arg
+entry_points.txt = setuptools.command.egg_info:write_entries
+namespace_packages.txt = setuptools.command.egg_info:overwrite_arg
+requires.txt = setuptools.command.egg_info:write_requirements
+top_level.txt = setuptools.command.egg_info:write_toplevel_names
+
+[setuptools.finalize_distribution_options]
+keywords = setuptools.dist:Distribution._finalize_setup_keywords
+parent_finalize = setuptools.dist:_Distribution.finalize_options

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/setuptools-80.10.2.dist-info/licenses/LICENSE

@@ -0,0 +1,17 @@
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to
+deal in the Software without restriction, including without limitation the
+rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+sell copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+IN THE SOFTWARE.

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/setuptools-80.10.2.dist-info/top_level.txt

@@ -0,0 +1,3 @@
+_distutils_hack
+pkg_resources
+setuptools

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/setuptools/_vendor/jaraco/text/Lorem ipsum.txt

@@ -0,0 +1,2 @@
+Lorem ipsum dolor sit amet, consectetur adipiscing elit, sed do eiusmod tempor incididunt ut labore et dolore magna aliqua. Ut enim ad minim veniam, quis nostrud exercitation ullamco laboris nisi ut aliquip ex ea commodo consequat. Duis aute irure dolor in reprehenderit in voluptate velit esse cillum dolore eu fugiat nulla pariatur. Excepteur sint occaecat cupidatat non proident, sunt in culpa qui officia deserunt mollit anim id est laborum.
+Curabitur pretium tincidunt lacus. Nulla gravida orci a odio. Nullam varius, turpis et commodo pharetra, est eros bibendum elit, nec luctus magna felis sollicitudin mauris. Integer in mauris eu nibh euismod gravida. Duis ac tellus et risus vulputate vehicula. Donec lobortis risus a elit. Etiam tempor. Ut ullamcorper, ligula eu tempor congue, eros est euismod turpis, id tincidunt sapien risus a quam. Maecenas fermentum consequat mi. Donec fermentum. Pellentesque malesuada nulla a mi. Duis sapien sem, aliquet nec, commodo eget, consequat quis, neque. Aliquam faucibus, elit ut dictum aliquet, felis nisl adipiscing sapien, sed malesuada diam lacus eget erat. Cras mollis scelerisque nunc. Nullam arcu. Aliquam consequat. Curabitur augue lorem, dapibus quis, laoreet et, pretium ac, nisi. Aenean magna nisl, mollis quis, molestie eu, feugiat in, orci. In hac habitasse platea dictumst.

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/apps/README.md

@@ -0,0 +1,26 @@
+# SPSDK Applications
+
+After installing SPSDK, several applications are present directly on PATH as executables.
+
+- [spsdk](spsdk_apps.py) - entry point for all available applications.
+- [blhost](blhost.py) - console script for MBoot module.
+- [dk6prog](dk6prog.py) - utility for DK6 Programming tool.
+- [nxpcrypto](nxpcrypto.py) - utility for generating/verifying RSA/ECC key pairs, and converting key file format (PEM/DER/RAW).
+- [nxpdebugmbox](nxpdebugmbox.py) - utility for performing the Debug Authentication.
+- [nxpdevhsm](nxpdevhsm.py) - utility for generating initialization SB file.
+- [nxpdevscan](nxpdevscan.py) - utility for listing all connected NXP USB and UART devices.
+- [nxpele](nxpele.py) -  utility for communication with NXP EdgeLock Enclave.
+- [nxpimage](nxpimage.py) - utility for generating TrustZone, MasterBootImage and SecureBinary images.
+- [pfr](pfr.py) - simple utility for creation and analysis of protected regions(PFR /IFR) - CMPA, CFPA, ROMCFG and CMACTABLE.
+- [sdphost](sdphost.py) - console script for SDP module.
+- [sdpshost](sdpshost.py) - console script for SDPS module.
+- [shadowregs](shadowregs.py) -  utility for Shadow Registers controlling.
+- [tpconfig](tpconfig.py) -  utility for Trust provisioning config application.
+- [tphost](tphost.py) -  utility for Trust provisioning host application.
+
+
+`` spsdk --help`` - lists all available commands.
+
+`` spsdk <application> --help`` - print help for given application.
+
+`` spsdk <application> <command> --help `` - print help for given command.

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/certgen_config.yaml

@@ -0,0 +1,65 @@
+# Copyright 2023-2024 NXP
+#
+# SPDX-License-Identifier: BSD-3-Clause
+
+# This is template for configuration file used for generating certificates
+
+# ==============================================
+# Issuer identification fields
+# ==============================================
+# All available option can be found within class NameOID in
+# cryptography/src/cryptography/x509/oid.py at https://github.com/pyca/cryptography
+
+issuer:
+  COMMON_NAME: NXP
+  COUNTRY_NAME: CZ
+  LOCALITY_NAME: Roznov pod Radhostem
+  STATE_OR_PROVINCE_NAME: Morava
+  STREET_ADDRESS: 1.maje 1009
+  ORGANIZATION_NAME: SPSDK Team
+
+# ==============================================
+# Subject identification fields
+# ==============================================
+# All available option can be found within class NameOID in
+# cryptography/src/cryptography/x509/oid.py at https://github.com/pyca/cryptography
+subject:
+  COMMON_NAME: NXP - SPSDK
+  COUNTRY_NAME: CZ
+  LOCALITY_NAME: Roznov pod Radhostem
+  STATE_OR_PROVINCE_NAME: Morava
+  STREET_ADDRESS: 1.maje 1009
+  ORGANIZATION_NAME: SPSDK Team
+  POSTAL_CODE: 756 61
+
+# ==============================================
+# The certificate settings
+# ==============================================
+
+# Path, where issuer private key is stored
+# If the issuer_private_key is encrypted, the interactive prompt will ask for password
+# For loading the password in non-interactive way, the configuration parameter 'issuer_private_key_password' can be used.
+# There are multiple formats of issuer_private_key_password values:
+#   1. If the value is an existing path, first line of file is read and returned
+#   2. If the value has format '$ENV_VAR', the value of environment variable ENV_VAR is returned
+#   3. If the value has format '$ENV_VAR' and the value contains a valid path to a file, the first line of a file is returned
+#   4. If the value does not match any options above, the input value itself is returned
+issuer_private_key: issuer_key.pem
+# Use PSS padding in case of RSA private key
+pss_padding: false
+# Path, where subject public key is stored
+subject_public_key: subject_key.pub
+# Serial number of certificate
+serial_number: 12346578
+# Validity duration in days
+duration: 3650
+
+# ==============================================
+# Certificate basic extensions
+# ==============================================
+extensions:
+  BASIC_CONSTRAINTS:
+    # Delegate certificate as a signing authority to create an intermediate certificates.
+    ca: false # Valid values true|false
+    # Integer length of the path of certificate signature from a given certificate, back to the root certificate
+    path_length:

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/crypto/oscca.asn

@@ -0,0 +1,27 @@
+-- Definition derived from openssl 3.0
+
+OSCCA DEFINITIONS ::= BEGIN
+
+    Signature ::= SEQUENCE {
+        r       INTEGER,
+        s       INTEGER
+    }
+
+    KeySet ::= SEQUENCE {
+        number  INTEGER,
+        prk     OCTET STRING,
+        puk     [1] EXPLICIT BIT STRING
+    }
+
+    Private ::= SEQUENCE {
+        number      INTEGER,
+        ids         SEQUENCE OF OBJECT IDENTIFIER,
+        keyset      OCTET STRING
+    }
+
+    Public ::= SEQUENCE {
+        ids     SEQUENCE OF OBJECT IDENTIFIER,
+        puk     BIT STRING
+    }
+
+END

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/crypto/ultimaco_puk.asn

@@ -0,0 +1,25 @@
+-- Definition based on OTPS HSM implementation
+-- To generate Python code use 'asn1ate' with pyparsing<3
+
+OTPS DEFINITIONS ::= BEGIN
+
+    AlgorithmIdentifier ::= SEQUENCE {
+        algorithm            OBJECT IDENTIFIER,
+        parameters           ANY DEFINED BY algorithm  OPTIONAL
+    }
+
+    SubjectPublicKeyInfo ::= SEQUENCE {
+        algorithm            AlgorithmIdentifier,
+        subjectPublicKey     BIT STRING
+    }
+
+    IdentifiedSubjectPublicKeyInfo ::= SEQUENCE {
+        identifier           [0] IMPLICIT IA5String,
+        version              [1] IMPLICIT INTEGER,
+        typeName             [2] IMPLICIT IA5String,
+        owner                [3] IMPLICIT IA5String OPTIONAL,
+        usage                [4] IMPLICIT INTEGER,
+        subjectPublicKeyInfo SubjectPublicKeyInfo
+    }
+
+END

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/database_defaults.yaml

@@ -0,0 +1,480 @@
+# Copyright 2023-2025 NXP
+#
+# SPDX-License-Identifier: BSD-3-Clause
+
+revisions: {}
+latest: latest
+
+# General MCU information
+info:
+  use_in_doc: True # Include this MCU in generated documentation
+  purpose: General Purpose Processor
+  # Web page of MCU representative
+  web: https://www.nxp.com
+  memory_map: {} # Memory map basic info
+  isp:
+    rom:
+      protocol: mboot # Possible options:[mboot, sdps, sdp]
+      interfaces: ["uart", "usb", "spi", "i2c"]
+    flashloader: {}
+
+features:
+  # ======== Communication buffer section ========
+  comm_buffer:
+    address: 0x2000_8000
+    size: 0x1000
+    tool: blhost
+
+  # ======== Fuses description section ========
+  fuses:
+    tool: blhost
+    reg_spec: fuses.json
+    grouped_registers: []
+
+  # ======== Blhost section ========
+  blhost: {}
+  #   properties:
+  #     0: list-properties
+  #     1: current-version
+  #     2: available-peripherals
+  #     3: flash-start-address
+  #     4: flash-size-in-bytes
+  #     5: flash-sector-size
+  #     6: flash-block-count
+  #     7: available-commands
+  #     8: check-status
+  #     9: reserved
+  #     10: verify-writes
+  #     11: max-packet-size
+  #     12: reserved-regions
+  #     13: reserved_1
+  #     14: ram-start-address
+  #     15: ram-size-in-bytes
+  #     16: system-device-id
+  #     17: security-state
+  #     18: unique-device-id
+  #     19: flash-fac-support
+  #     20: flash-access-segment-size
+  #     21: flash-access-segment-count
+  #     22: flash-read-margin
+  #     23: qspi/otfad-init-status
+  #     24: target-version
+  #     25: external-memory-attributes
+  #     26: reliable-update-status
+  #     27: flash-page-size
+  #     28: irq-notify-pin
+  #     29: pfr-keystore-update-opt
+  #     30: byte-write-timeout-ms
+  #     31: fuse-locked-status
+
+  # ======== Certificate block section ========
+  cert_block:
+    sub_features: [based_on_cert1]
+    rot_type: "cert_block_1"
+    isk_data_alignment: 4
+    isk_data_limit: 96
+
+  # ======== DAT section ========
+  dat:
+    socc: 0 # SOCC identification
+    based_on_ele: False # Flag if the implementation of DAT is based on EdgeLock Enclave
+    # famode_cert: [] # List of Fault analysis Mode certificates (names of MBI classes)
+    # famode_cfg_defaults: {} # Dictionary of default values of standard MBI members for FAmode image
+    used_beacons_on_ele: False # The DAT ELE implementation is using certificate and authentication beacons
+    auth_beacon_length: 2 # The length in bytes of authentication beacon
+
+    dmbox_ap_ix: -1 # Typical Index of debug mailbox access port is 2
+    mem_ap_ix: -1 # Typical Index of debug mailbox access port is 0
+    # non_standard_statuses: # dictionary of non standard return statuses from various commands
+    #   2:  # Command get_crp_level
+    #     0xFFFF_FFFF: ROP_LEVEL0
+    #     0xEEBA_04C3: ROP_LEVEL1
+    #     0x4939_8D8B: ROP_LEVEL2
+    #     0xB0AB_B703: ROP_LEVEL3
+    dac_rot_type: default # Default type is full RKTH/SRK value
+
+    command_delays: # Additional standard command delays per individual DM commands
+      ERASE_FLASH: 0.5
+
+    # Memory addresses for SSF certificate data
+    ssf_cert_memory:
+      ecdsa_puk_address: 0x0 # Default address for ECDSA PUK (will be overridden by device-specific values)
+      ecdsa_puk_size: 0x0 # Default size for ECDSA PUK
+      hybrid_puk_address: 0x0 # Default address for Hybrid PUK
+      hybrid_puk_size: 0x0 # Default size for Hybrid PUK
+
+  # ======== MBI section ========
+  mbi:
+    mbi_classes: {}
+    images: {}
+
+  # ======== HABv4 section ========
+  hab: {}
+
+  # ======== AHAB section ========
+  ahab:
+    sub_features: [ahab_image]
+    containers_max_cnt: 2
+    oem_images_max_cnt: 8
+    valid_offset_minimal_alignment: 4
+    container_types: [1] # Supported container types
+    certificate_type: standard # The standard certificate
+    iae_has_signed_offsets: False # There is a special cases when the Container is after images
+    core_ids: {}
+    image_types: {}
+    image_types_mapping: {}
+    allow_empty_hash: False # Some chips allow empty image hash in OEM Open LC
+    # image_types: Keep it here as a template for new NPI
+    #     CSF: [0x01, csf, CSF Image]
+    #     SCD: [0x02, scd, SCD Image]
+    #     EXECUTABLE: [0x03, executable, Executable Image]
+    #     DATA: [0x04, data, Data Image]
+    #     DCD_IMAGE: [0x05, dcd_image, DCD Image]
+    #     ELE: [0x06, ele, EdgeLock Enclave Image]
+    #     PROVISIONING_IMAGE: [0x07, provisioning_image, Provisioning Image]
+    #     DEK_VALIDATION_FCB_CHK: [0x08, dek_validation_fcb_chk, DEK validation FCB check Image]
+    #     PROVISIONING_DATA: [0x09, provisioning_data, Provisioning data Image]
+    #     EXECUTABLE_FAST_BOOT_IMAGE: [0x0A, executable_fast_boot_image, Executable fast boot Image]
+    #     V2X_PRIMARY: [0x0B, v2x_primary, V2X primary Image]
+    #     V2X_SECONDARY: [0x0C, v2x_secondary, V2X secondary Image]
+    #     V2X_ROM_PATCH: [0x0D, v2x_rom_patch, V2X rom patch Image]
+    #     V2X_DUMMY: [0x0E, v2x_dummy, V2X dummy Image]
+
+    double_authentication_load_address: 0
+    double_authentication_core_id: 0
+    double_authentication_image_type: 0
+
+    extra_containers: []
+    fuses:
+      _name: "AHAB SRK"
+      srkh: "__srk_hash" # SRK hash fuse
+
+  # ======== PFR section ========
+  pfr:
+    sub_features: [cmpa, cfpa]
+    cmpa:
+      erase_method: write_memory
+      additional_data: # extra data defined by customer
+        enabled: False
+        offset: -1
+        max_size: 0
+    cfpa:
+      additional_data: # extra data defined by customer
+        enabled: False
+        offset: -1
+        max_size: 0
+    requires_reset: False
+    requires_scratch_erase: False
+
+  # ======== Bootable image section ========
+  bootable_image:
+    mem_types: {}
+
+  # ======== FCB section ========
+  fcb:
+    mem_types: {}
+
+  # ======== XMCD section ========
+  xmcd:
+    header:
+      reg_spec: ../../common/xmcd/flexspi_ram_header.json
+    mem_types: {}
+    fuses: {}
+
+  # ======== BEE section ========
+  bee: {}
+
+  # ======== IEE section ========
+  iee:
+    key_blob_rec_size: 96
+    key_blob_max_cnt: 4
+    key_blob_min_cnt: 4
+    has_kek_fuses: False
+    additional_template: []
+    additional_template_text: ""
+    generate_keyblob: True
+
+  # ======== OTFAD section ========
+  otfad:
+    key_blob_rec_size: 64
+    key_blob_max_cnt: 4
+    key_blob_min_cnt: 4
+    byte_swap: false
+    keyblob_byte_swap_cnt: 0
+    sb_21_supported: True
+    has_kek_fuses: False
+    additional_template: []
+    additional_template_text: ""
+    supports_key_scrambling: False
+    reversed_scramble_key: False
+
+  # ======== Secure binary v2.1 section ========
+  sb21:
+    keyblobs: true
+    supported_commands: []
+
+  # ======== Secure binary v3.1 section ========
+  sb31:
+    supported_commands: []
+    key_wraps_version: 1
+    variable_block_length: false
+    commands_block_length: 256
+    supports_compression: false
+    command_rules: []
+
+  # ======== Secure binary v4.0 section ========
+  sb40:
+    supported_commands: []
+    key_wraps_version: 2
+    variable_block_length: true
+    commands_block_length: 4096
+    supports_compression: true
+
+  # ======== Secure binary vX section ========
+  sbx:
+    commands_block_length: 256
+    variable_block_length: false
+    supported_commands: []
+
+  # ======== Secure binary c section ========
+  sbc:
+    commands_block_length: 256
+    key_wraps_version: 2
+    variable_block_length: false
+    supported_commands: []
+
+  # ======== Shadow registers section ========
+  shadow_regs:
+    inverted_regs: {}
+    computed_fields: {}
+    reset_type: hw_reset # possible options: [hw_reset, nvic_reset]
+
+  # ======== Device Hardware Security Module (HSM) section ========
+  devhsm:
+    sub_features: [DevHsm]
+    supported_commands:
+      - erase
+      - load
+      - programFuses
+      - programIFR
+      - copy
+      - loadKeyBlob
+      - configureMemory
+      - fillMemory
+      - checkFwVersion
+    flag: 0x1
+    key_blob_offset: 0x4
+    key_blob_command_position: -1
+    devbuff_wrapped_cust_mk_sk_key_size: 0x30
+
+  # ======== Trust Zone section ========
+  tz:
+    version: v1 # TrustZone configuration version  v1.0
+    reg_spec: tz.json
+
+  # ======== EdgeLock Enclave section ========
+  ele:
+    ele_device: uboot_fastboot
+
+  # ======== Memory configuration ========
+  memcfg:
+    data_file: ../../common/memcfg/memcfg_data.yaml
+    peripherals:
+      flexspi_nor:
+        reg_spec: ../../common/memcfg/opt_word_flexspi_nor.json
+        region_number: 0x09
+        ow_counts_rule: OptionSize
+        runtime_instance: True
+        mem_type: nor
+        interfaces: [octal_spi, quad_spi, hyper_flash]
+        instances: []
+      xspi_nor:
+        reg_spec: ../../common/memcfg/opt_word_xspi_nor.json
+        region_number: 0x0b
+        ow_counts_rule: OptionSize
+        runtime_instance: True
+        mem_type: nor
+        interfaces: [octal_spi, quad_spi]
+        instances: []
+      flexspi_nand:
+        reg_spec: ../../common/memcfg/opt_word_flexspi_nand.json
+        region_number: 0x101
+        ow_counts_rule: OptionSize
+        runtime_instance: True
+        mem_type: nand
+        interfaces: [quad_spi]
+        instances: []
+      semc_nor:
+        reg_spec: ../../common/memcfg/opt_word_semc_nor.json
+        region_number: 0x08
+        ow_counts_rule: AcTimingMode
+        mem_type: nor
+        interfaces: [parallel]
+        instances: []
+      semc_nand:
+        reg_spec: ../../common/memcfg/opt_word_semc_nand.json
+        region_number: 0x100
+        ow_counts_rule: All
+        mem_type: nand
+        interfaces: [parallel]
+        instances: []
+      spi_nor:
+        reg_spec: ../../common/memcfg/opt_word_spi_nor.json
+        region_number: 0x110
+        ow_counts_rule: OptionSize
+        mem_type: nor
+        interfaces: [spi]
+        instances: []
+      # spi_nand:
+      #   region_number: 0x101
+      #   instances: []
+      mmc:
+        reg_spec: ../../common/memcfg/opt_word_mmc.json
+        region_number: 0x121
+        ow_counts_rule: All
+        mem_type: sd
+        interfaces: [instance_0, instance_1, instance_2, instance_3]
+        instances: []
+      emmc:
+        reg_spec: ../../common/memcfg/opt_word_emmc.json
+        region_number: 0x121
+        ow_counts_rule: All
+        mem_type: sd
+        interfaces: [instance_0, instance_1, instance_2, instance_3]
+        instances: []
+      sd:
+        reg_spec: ../../common/memcfg/opt_word_sd.json
+        region_number: 0x120
+        ow_counts_rule: All
+        mem_type: sd
+        interfaces: [instance_0, instance_1, instance_2, instance_3]
+        instances: []
+    # XIP Memories in internal memory address range
+    # mem_region_internal = 0x0  # Internal memory (include all on chip memory)
+    # mem_region_quad_spi0 = 0x1  # Quad SPI memory 0
+    # mem_region_ifr0_fuse = 0x4  # Nonvolatile information register 0. Only used by SB loader.
+    # mem_region_semc_nor = 0x8  # SEMC Nor memory
+    # mem_region_flexspi_nor = 0x9  # Flex SPI Nor memory
+    # mem_region_spifi_nor = 0xA  # SPIFI Nor memory
+    # mem_region_flash_execute_only = 0x10  # Execute-only region on internal Flash
+
+    # # NON-XIP Memories in external memory address range
+    # mem_region_semc_nand = 0x100 + 0x0  # SEMC NAND memory
+    # mem_region_spi_nand = 0x100 + 0x1  # SPI NAND memory
+    # mem_region_spi_nor_eeprom = 0x100 + 0x10  # SPI NOR/EEPROM memory
+    # mem_region_i2c_nor_eeprom = 0x100 + 0x11  # I2C NOR/EEPROM memory
+    # mem_region_sd = 0x100 + 0x20  # eSD, SD, SDHC, SDXC memory Card
+    # mem_region_mmc = 0x100 + 0x21  # MMC, eMMC memory Card
+
+  # ======== Wireless Power section ========
+  wpc:
+    insert_puc_only: false
+    need_reset: false
+    need_address_adjust: false
+    check_lifecycle: 0
+
+  # ======== Misc signing section ========
+  signing:
+    pss_padding: false
+
+  # ======== EL2GO TP section ========
+  el2go_tp:
+    el2go_interface: mboot
+    el2go_name: null
+    prov_method: null
+    use_additional_data: false
+    fw_load_address: -1
+    fw_read_address: -1
+    user_data_address: -1
+    ignored_otp: [] # format: index of a fuse (not uid, just the number)
+    ignored_otp_ranges: [] # format: [range1_start, range1_end, range2_start, range2_end,...]
+    clean_method: "none"
+    # format: "method1=value1[,value2];method2=value3;..." or "none" (default)
+    # methods are in secure_object.py:ValidationMethod
+    validation_method: "none"
+    uuid_fuse_index: "6 0 4"
+    use_prov_report: false
+
+  # ======== LPCPROG section ========
+  lpcprog:
+    part_ids: {}
+    buffer_address: 0x1000_0800
+    buffer_size: 0x400
+    page_size: 0x40
+    sector_size: 0x400
+
+  # ======== DICE configuration ========
+  dice:
+    had_length: 48
+    had_members:
+      [
+        ELS_AS_CFG0,
+        ELS_AS_CFG1,
+        ELS_AS_CFG2,
+        ELS_AS_ST0,
+        ELS_AS_ST1,
+        ELS_AS_ST2,
+        ELS_AS_FLAG0,
+      ]
+    critical_had_members: [ELS_AS_CFG0, ELS_AS_CFG1, ELS_AS_CFG2]
+    rtf_length: 32
+    ca_puk_length: 64
+    rkth_length: 32
+    rkth_truncated_length: 32
+    need_reset: false
+
+  # ======== Fastboot ========
+  fastboot:
+    address: 0x8280_0000
+    size: 0x2000_0000
+
+  # ======== nxpuuu ==========
+  nxpuuu:
+    boot_devices:
+      emmc:
+        script: ../../common/uuu/emmc_burn_loader.lst
+        arguments: [_flash.bin, _image]
+      emmc_all:
+        script: ../../common/uuu/emmc_burn_all.lst
+        arguments: [_flash.bin, _image]
+      fat_write:
+        script: ../../common/uuu/fat_write.lst
+        arguments: [_image, _device, _partition, _filename]
+      nand:
+        script: ../../common/uuu/nand_burn_loader.lst
+        arguments: [_flash.bin, _image]
+      nvme_all:
+        script: ../../common/uuu/nvme_burn_all.lst
+        arguments: [_flash.bin, _image]
+      qspi:
+        script: ../../common/uuu/qspi_burn_loader.lst
+        arguments: [_flash.bin, _image]
+      sd:
+        script: ../../common/uuu/sd_burn_loader.lst
+        arguments: [_flash.bin, _image]
+      sd_all:
+        script: ../../common/uuu/sd_burn_all.lst
+        arguments: [_flash.bin, _image]
+      spi_nand:
+        script: ../../common/uuu/fspinand_burn_loader.lst
+        arguments: [_flash.bin, _image]
+      spl:
+        script: ../../common/uuu/spl_boot.lst
+        arguments: [_flash.bin]
+
+  # ======== BCA section ========
+  bca:
+    reg_spec: bca.json
+
+  # ======== FCF section ========
+  fcf:
+    reg_spec: fcf.json
+
+  # ======== SHE section ========
+  she_scec: {}
+
+  # ===== TLV =====
+  tlv_blob: {}
+
+  # ======== Hardware Security Engine section ========
+  hse: {}

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/dice/fmc_template.yaml

@@ -0,0 +1,28 @@
+# Copyright 2025 NXP
+#
+# SPDX-License-Identifier: BSD-3-Clause
+
+# issuer common name; required
+issuer_name: NXP DICE 2.0 - IDevID
+# subject common name; required
+subject_name: NXP DICE 2.0 - FMC Alias
+
+# Include Customer TCB Table; optional (default=false)
+include_cust_table: true
+# Customer SVN for Customer TCB Table; required if include_cust_table = true
+cust_svn: 0xabcd
+
+# Include NXP TCB Table; optional (default=false)
+include_nxp_table: true
+
+# ECDSA/MLDSA mode; optional (default=ecdsa)
+mode: ecdsa
+# Template key; optional (if omitted a new temporary key will be generated each time)
+template_key: idevid_ecc384.pem
+
+# Where to store the FMC Alias certificate; optional
+template_output: alias_fmc.der
+# Where to store the FMC Alias certificate offset descriptor; optional
+descriptor_output: descriptor.bin
+# Where to store the final FMC Alias certificate container; required
+container_output: container.bin

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/dice/tcg_dice.asn

@@ -0,0 +1,65 @@
+TCG DEFINITIONS ::= BEGIN
+
+    tcg OBJECT IDENTIFIER ::= { 2 23 133 }
+    tcg-dice OBJECT IDENTIFIER ::= { tcg platformClass(5) 4 }
+
+    FWID ::= SEQUENCE {
+        hashAlg OBJECT IDENTIFIER,
+        digest OCTET STRING
+    }
+
+    FWIDLIST ::= SEQUENCE SIZE (1..10) OF FWID
+
+    OperationalFlags ::= BIT STRING {
+        notConfigured (0),
+        notSecure (1),
+        recovery (2),
+        debug (3),
+        notReplayProtected (4),
+        notIntegrityProtected (5),
+        notRuntimeMeasured (6),
+        notImmutable (7),
+        notTcb (8),
+        fixedWidth (31)
+    }
+
+    OperationalFlagsMask ::= BIT STRING {
+        notConfigured (0),
+        notSecure (1),
+        recovery (2),
+        debug (3),
+        notReplayProtected (4),
+        notIntegrityProtected (5),
+        notRuntimeMeasured (6),
+        notImmutable (7),
+        notTcb (8),
+        fixedWidth (31)
+    }
+
+    tcg-dice-TcbInfo OBJECT IDENTIFIER ::= { tcg-dice 1 }
+
+    DiceTcbInfo ::= SEQUENCE {
+        vendor      [0] IMPLICIT UTF8String OPTIONAL,
+        model       [1] IMPLICIT UTF8String OPTIONAL,
+        version     [2] IMPLICIT UTF8String OPTIONAL,
+        svn         [3] IMPLICIT INTEGER OPTIONAL,
+        layer       [4] IMPLICIT INTEGER OPTIONAL,
+        index       [5] IMPLICIT INTEGER OPTIONAL,
+        fwids       [6] IMPLICIT FWIDLIST OPTIONAL,
+        flags       [7] IMPLICIT OperationalFlags OPTIONAL,
+        vendorInfo  [8] IMPLICIT OCTET STRING OPTIONAL,
+        type        [9] IMPLICIT OCTET STRING OPTIONAL,
+        flagsMask   [10]IMPLICIT OperationalFlagsMask OPTIONAL
+    }
+
+    tcg-dice-MultiTcbInfo OBJECT IDENTIFIER ::= { tcg-dice 5 }
+
+    DiceTcbInfoSeq ::= SEQUENCE SIZE (1..3) OF DiceTcbInfo
+
+    tcg-dice-Ueid OBJECT IDENTIFIER ::= { tcg-dice 4 }
+
+    TcgUeid ::= SEQUENCE {
+        ueid OCTET STRING
+    }
+
+END

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/fcb_flexspi_nor_modification.yaml

@@ -0,0 +1,508 @@
+# Copyright 2025 NXP
+#
+# SPDX-License-Identifier: BSD-3-Clause
+
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+    field0EA-bits-0-7:
+      no_yaml_comments: true
+    field0EA-bits-10-15:
+      no_yaml_comments: true
+    field0EA-bits-8-9:
+      no_yaml_comments: true
+  no_yaml_comments: true
+field0EC:
+  bitfields:
+    field0EC-bits-0-7:
+      no_yaml_comments: true
+    field0EC-bits-10-15:
+      no_yaml_comments: true
+    field0EC-bits-8-9:
+      no_yaml_comments: true
+  no_yaml_comments: true
+field0EE:
+  bitfields:
+    field0EE-bits-0-7:
+      no_yaml_comments: true
+    field0EE-bits-10-15:
+      no_yaml_comments: true
+    field0EE-bits-8-9:
+      no_yaml_comments: true
+  no_yaml_comments: true
+field0F2:
+  bitfields:
+    field0F2-bits-0-7:
+      no_yaml_comments: true
+    field0F2-bits-10-15:
+      no_yaml_comments: true
+    field0F2-bits-8-9:
+      no_yaml_comments: true
+  no_yaml_comments: true
+field0F4:
+  bitfields:
+    field0F4-bits-0-7:
+      no_yaml_comments: true
+    field0F4-bits-10-15:
+      no_yaml_comments: true
+    field0F4-bits-8-9:
+      no_yaml_comments: true
+  no_yaml_comments: true
+field0F6:
+  bitfields:
+    field0F6-bits-0-7:
+      no_yaml_comments: true
+    field0F6-bits-10-15:
+      no_yaml_comments: true
+    field0F6-bits-8-9:
+      no_yaml_comments: true
+  no_yaml_comments: true
+field0F8:
+  bitfields:
+    field0F8-bits-0-7:
+      no_yaml_comments: true
+    field0F8-bits-10-15:
+      no_yaml_comments: true
+    field0F8-bits-8-9:
+      no_yaml_comments: true
+  no_yaml_comments: true
+field0FA:
+  bitfields:
+    field0FA-bits-0-7:
+      no_yaml_comments: true
+    field0FA-bits-10-15:
+      no_yaml_comments: true
+    field0FA-bits-8-9:
+      no_yaml_comments: true
+  no_yaml_comments: true
+field0FC:
+  bitfields:
+    field0FC-bits-0-7:
+      no_yaml_comments: true
+    field0FC-bits-10-15:
+      no_yaml_comments: true
+    field0FC-bits-8-9:
+      no_yaml_comments: true
+  no_yaml_comments: true
+field0FE:
+  bitfields:
+    field0FE-bits-0-7:
+      no_yaml_comments: true
+    field0FE-bits-10-15:
+      no_yaml_comments: true
+    field0FE-bits-8-9:
+      no_yaml_comments: true
+  no_yaml_comments: true

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/memcfg/memcfg_data.yaml

@@ -0,0 +1,380 @@
+# Copyright 2023-2025 NXP
+#
+# SPDX-License-Identifier: BSD-3-Clause
+
+# ======== Flash memories configuration ========
+
+# ***********************************************************************
+#                            NOR
+# ***********************************************************************
+
+# Winbond
+W25QxxxJV:
+  manufacturer: Winbond
+  type: nor
+  interfaces:
+    quad_spi:
+      option_words: [0xc0000007]
+      tested: True
+W35T51NW:
+  manufacturer: Winbond
+  type: nor
+  interfaces:
+    octal_spi:
+      option_words: [0xc0603005]
+# Macronix
+MX25Uxxx32F:
+  manufacturer: Macronix
+  type: nor
+  interfaces:
+    quad_spi:
+      option_words: [0xc0000007]
+      tested: True
+MX25Lxxx45G:
+  manufacturer: Macronix
+  type: nor
+  interfaces:
+    quad_spi:
+      option_words: [0xc0000007]
+      tested: True
+MX25UMxxx45G:
+  manufacturer: Macronix
+  type: nor
+  interfaces:
+    octal_spi:
+      option_words: [0xc0403007]
+MX66UMxxx45G:
+  manufacturer: Macronix
+  type: nor
+  interfaces:
+    octal_spi:
+      option_words: [0xc0403007]
+MX25LMxxx45G:
+  manufacturer: Macronix
+  type: nor
+  interfaces:
+    octal_spi:
+      option_words: [0xc0403007]
+MX25UM51345G:
+  manufacturer: Macronix
+  type: nor
+  interfaces:
+    octal_spi:
+      option_words: [0xc0403007]
+# GigaDevice
+GD25QxxxC:
+  manufacturer: GigaDevice
+  type: nor
+  interfaces:
+    quad_spi:
+      option_words: [0xc0000406]
+GD25LBxxxE:
+  manufacturer: GigaDevice
+  type: nor
+  interfaces:
+    quad_spi:
+      option_words: [0xc0000007]
+GD25LTxxxE:
+  manufacturer: GigaDevice
+  type: nor
+  interfaces:
+    quad_spi:
+      option_words: [0xc0000008]
+GD25LXxxxE:
+  manufacturer: GigaDevice
+  type: nor
+  interfaces:
+    quad_spi:
+      option_words: [0xc0603008]
+# ISSI
+IS25LPxxxA:
+  manufacturer: ISSI
+  type: nor
+  interfaces:
+    quad_spi:
+      option_words: [0xc0000007]
+IS25WPxxxA:
+  manufacturer: ISSI
+  type: nor
+  interfaces:
+    quad_spi:
+      option_words: [0xc0000007]
+IS25LXxxx:
+  manufacturer: ISSI
+  type: nor
+  interfaces:
+    octal_spi:
+      option_words: [0xC0603005]
+IS25WXxxx:
+  manufacturer: ISSI
+  type: nor
+  interfaces:
+    octal_spi:
+      option_words: [0xC0603005]
+IS26KSxxxS:
+  manufacturer: ISSI
+  type: nor
+  interfaces:
+    hyper_flash:
+      option_words: [0xc0233007]
+IS26KLxxxS:
+  manufacturer: ISSI
+  type: nor
+  interfaces:
+    hyper_flash:
+      option_words: [0xc0233007]
+# Micron
+MT25QLxxxA:
+  manufacturer: Micron
+  type: nor
+  interfaces:
+    quad_spi:
+      option_words: [0xc0000007]
+MT35XUxxxABA1G:
+  manufacturer: Micron
+  type: nor
+  interfaces:
+    octal_spi:
+      option_words: [0xC0703005]
+MT35XUxxxABA2G:
+  manufacturer: Micron
+  type: nor
+  interfaces:
+    octal_spi:
+      option_words: [0xC0633005]
+      tested: True
+MT28EW128ABA:
+  manufacturer: Micron
+  type: nor
+  interfaces:
+    parallel:
+      option_words: [0xD0000600]
+MT28UG128ABA:
+  manufacturer: Micron
+  type: nor
+  interfaces:
+    parallel:
+      option_words: [0xD0000601]
+# Adesto
+AT25SFxxxA:
+  manufacturer: Adesto
+  type: nor
+  interfaces:
+    quad_spi:
+      option_words: [0xc0000007]
+ATXPxxx:
+  manufacturer: Adesto
+  type: nor
+  interfaces:
+    octal_spi:
+      option_words: [0xc0803007]
+# Cypress
+S25FSxxxS:
+  manufacturer: Cypress
+  type: nor
+  interfaces:
+    quad_spi:
+      option_words: [0xc0000007]
+S25FLxxxS:
+  manufacturer: Cypress
+  type: nor
+  interfaces:
+    quad_spi:
+      option_words: [0xc0000007]
+S26KSxxxS:
+  manufacturer: Cypress
+  type: nor
+  interfaces:
+    hyper_flash:
+      option_words: [0xc0233007]
+S26KLxxxS:
+  manufacturer: Cypress
+  type: nor
+  interfaces:
+    hyper_flash:
+      option_words: [0xc0233007]
+# Microchip
+SST26VFxxxB:
+  manufacturer: Microchip
+  type: nor
+  interfaces:
+    quad_spi:
+      option_words: [0xc0000005]
+# FudanMicro
+FM25Qxxx:
+  manufacturer: FudanMicro
+  type: nor
+  interfaces:
+    quad_spi:
+      option_words: [0xc0000205]
+# BoyaMicro
+BY25QxxxBS:
+  manufacturer: BoyaMicro
+  type: nor
+  interfaces:
+    quad_spi:
+      option_words: [0xc0000405]
+# XMC
+XM25QHxxxB:
+  manufacturer: XMC
+  type: nor
+  interfaces:
+    quad_spi:
+      option_words: [0xc0000007]
+XM25QUxxxB:
+  manufacturer: XMC
+  type: nor
+  interfaces:
+    quad_spi:
+      option_words: [0xc0000007]
+# XTXtech
+X25FxxxB:
+  manufacturer: XTXtech
+  type: nor
+  interfaces:
+    quad_spi:
+      option_words: [0xc0000407]
+X25QxxxD:
+  manufacturer: XTXtech
+  type: nor
+  interfaces:
+    quad_spi:
+      option_words: [0xc0000407]
+# Puya
+P25QxxxLE:
+  manufacturer: Puya
+  type: nor
+  interfaces:
+    quad_spi:
+      option_words: [0xc0000405]
+P25QxxxH:
+  manufacturer: Puya
+  type: nor
+  interfaces:
+    quad_spi:
+      option_words: [0xc0000405]
+P25QxxxU:
+  manufacturer: Puya
+  type: nor
+  interfaces:
+    quad_spi:
+      option_words: [0xc0000405]
+# AMIC
+A25LQxxx:
+  manufacturer: AMIC
+  type: nor
+  interfaces:
+    quad_spi:
+      option_words: [0xc0000105]
+
+# ***********************************************************************
+#                            NAND
+# ***********************************************************************
+
+# Winbond
+W25N01G:
+  manufacturer: Winbond
+  type: nand
+  interfaces:
+    quad_spi:
+      option_words: [0xC1010026, 0x000000ef]
+W25N02K:
+  manufacturer: Winbond
+  type: nand
+  interfaces:
+    quad_spi:
+      option_words: [0xC1020026, 0x000000ef]
+# Macronix
+MX35UF1G:
+  manufacturer: Macronix
+  type: nand
+  interfaces:
+    quad_spi:
+      option_words: [0xC1010026, 0x000000c2]
+MX35LF1G:
+  manufacturer: Macronix
+  type: nand
+  interfaces:
+    quad_spi:
+      option_words: [0xC1010026, 0x000000c2]
+MX35UF2G:
+  manufacturer: Macronix
+  type: nand
+  interfaces:
+    quad_spi:
+      option_words: [0xC1020026, 0x000000c2]
+MX35LF2G:
+  manufacturer: Macronix
+  type: nand
+  interfaces:
+    quad_spi:
+      option_words: [0xC1020026, 0x000000c2]
+# GigaDevice
+GD5F1GQ5:
+  manufacturer: GigaDevice
+  type: nand
+  interfaces:
+    quad_spi:
+      option_words: [0xC1010026, 0x000000c8]
+GD5F2GQ5:
+  manufacturer: GigaDevice
+  type: nand
+  interfaces:
+    quad_spi:
+      option_words: [0xC1020026, 0x000000c8]
+# Micron
+MT29F1G01AA:
+  manufacturer: Micron
+  type: nand
+  interfaces:
+    quad_spi:
+      option_words: [0xC1011022, 0x0000002c]
+MT29F2G01AA:
+  manufacturer: Micron
+  type: nand
+  interfaces:
+    quad_spi:
+      option_words: [0xC1021022, 0x0000002c]
+# Paragon
+PN26Q01A:
+  manufacturer: Paragon
+  type: nand
+  interfaces:
+    quad_spi:
+      option_words: [0xC1010026, 0x000000a1]
+PN26G01A:
+  manufacturer: Paragon
+  type: nand
+  interfaces:
+    quad_spi:
+      option_words: [0xC1010026, 0x000000a1]
+PN26Q02A:
+  manufacturer: Paragon
+  type: nand
+  interfaces:
+    quad_spi:
+      option_words: [0xC1020026, 0x000000a1]
+PN26G02A:
+  manufacturer: Paragon
+  type: nand
+  interfaces:
+    quad_spi:
+      option_words: [0xC1020026, 0x000000a1]
+
+# ***********************************************************************
+#                            SD
+# ***********************************************************************
+
+# General
+1bit_sdr12:
+  manufacturer: General
+  type: sd
+  interfaces:
+    instance_0:
+      option_words: [0xD0000000]
+    instance_1:
+      option_words: [0xD0000001]
+    instance_2:
+      option_words: [0xD0000002]
+    instance_3:
+      option_words: [0xD0000003]

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/memcfg/opt_word_emmc.json

@@ -0,0 +1,395 @@
+{
+    "cpu": "General",
+    "groups": [
+        {
+            "group": {
+                "name": "General regs",
+                "description": "General register generated by SPSDK"
+            },
+            "registers": [
+                {
+                    "id": "field000",
+                    "offset_int": "0x0",
+                    "reg_width": 32,
+                    "name": "ConfigOption0",
+                    "description": "eMMC card Configuration Option 0",
+                    "default_value_int": "0xc0000000",
+                    "bitfields": [
+                        {
+                            "id": "field000-bit0",
+                            "width": 1,
+                            "name": "BootConfigEnable",
+                            "access": "RW",
+                            "description": "Boot configuration",
+                            "values": [
+                                {
+                                    "name": "Disabled",
+                                    "value": 0,
+                                    "description": "Boot configuration disabled"
+                                },
+                                {
+                                    "name": "Enabled",
+                                    "value": 1,
+                                    "description": "Boot configuration enabled"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 1
+                        },
+                        {
+                            "id": "field000-bit2",
+                            "width": 1,
+                            "name": "BootAcknowledge",
+                            "access": "RW",
+                            "description": "Boot acknowledge",
+                            "values": [
+                                {
+                                    "name": "Disabled",
+                                    "value": 0,
+                                    "description": "Boot acknowledge disabled"
+                                },
+                                {
+                                    "name": "Enabled",
+                                    "value": 1,
+                                    "description": "Boot acknowledge enabled"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bit3",
+                            "width": 1,
+                            "name": "ResetBootBusConditions",
+                            "access": "RW",
+                            "description": "Reset boot BUS conditions",
+                            "values": [
+                                {
+                                    "name": "Disabled",
+                                    "value": 0,
+                                    "description": "Don't change BUS conditions"
+                                },
+                                {
+                                    "name": "Enabled",
+                                    "value": 1,
+                                    "description": "Reset boot BUS conditions"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits4-5",
+                            "width": 2,
+                            "name": "BootMode",
+                            "access": "RW",
+                            "description": "Boot mode configuration",
+                            "values": [
+                                {
+                                    "name": "SDRWithDefaultTiming",
+                                    "value": 0,
+                                    "description": "Single data rate with backward compatible timings"
+                                },
+                                {
+                                    "name": "SDRWithHighSpeedTiming",
+                                    "value": 1,
+                                    "description": "Single data rate with high speed timing"
+                                },
+                                {
+                                    "name": "DDRTiming",
+                                    "value": 2,
+                                    "description": "Dual date rate"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 2
+                        },
+                        {
+                            "id": "field000-bits8-11",
+                            "width": 4,
+                            "name": "BusWidth",
+                            "access": "RW",
+                            "description": "eMMC card data bus width(BUS_WIDTH in Extended CSD)",
+                            "values": [
+                                {
+                                    "name": "1bit",
+                                    "value": 0,
+                                    "description": "eMMC data bus width is 1 bit"
+                                },
+                                {
+                                    "name": "4bit",
+                                    "value": 1,
+                                    "description": "eMMC data bus width is 4 bits"
+                                },
+                                {
+                                    "name": "8bit",
+                                    "value": 2,
+                                    "description": "eMMC data bus width is 8 bits"
+                                },
+                                {
+                                    "name": "4bitDDR",
+                                    "value": 5,
+                                    "description": "eMMC data bus width is 4 bits ddr"
+                                },
+                                {
+                                    "name": "8bitDDR",
+                                    "value": 6,
+                                    "description": "eMMC data bus width is 8 bits ddr"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits12-15",
+                            "width": 4,
+                            "name": "TimingMode",
+                            "access": "RW",
+                            "description": "Select the bus timing when accesses eMMC memory",
+                            "values": [
+                                {
+                                    "name": "HighSpeedTimingNormal",
+                                    "value": 0,
+                                    "description": "eMMC card using none high-speed timing"
+                                },
+                                {
+                                    "name": "HighSpeedTiming",
+                                    "value": 1,
+                                    "description": "eMMC card using high-speed timing"
+                                },
+                                {
+                                    "name": "HighSpeed200Timing",
+                                    "value": 2,
+                                    "description": "eMMC card high speed 200 timing"
+                                },
+                                {
+                                    "name": "HighSpeed400Timing",
+                                    "value": 3,
+                                    "description": "eMMC card high speed 400 timing"
+                                }
+                              ]
+                        },
+                        {
+                            "id": "field000-bits16-17",
+                            "width": 2,
+                            "name": "BootBusWidth",
+                            "access": "RW",
+                            "description": "eMMC card boot bus width(BOOT_BUS_WIDTH in Extended CSD)",
+                            "values": [
+                                {
+                                    "name": "1bitSDR4bitDDR",
+                                    "value": 0,
+                                    "description": "x1 (sdr) or x4 (ddr) bus width in boot operation mode(default)"
+                                },
+                                {
+                                    "name": "4bitSDR4bitDDR",
+                                    "value": 1,
+                                    "description": "x4 (sdr/ddr) bus width in boot operation mode"
+                                },
+                                {
+                                    "name": "8bitSDR8bitDDR",
+                                    "value": 2,
+                                    "description": "x8 (sdr/ddr) bus width in boot operation mode"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 2
+                        },
+                        {
+                            "id": "field000-bits20-22",
+                            "width": 3,
+                            "name": "BootPartitionEnabled",
+                            "access": "RW",
+                            "description": "eMMC card boot partition enabled(BOOT_PARTITION_ENABLE in Extended CSD)",
+                            "values": [
+                                {
+                                    "name": "Not",
+                                    "value": 0,
+                                    "description": "Device not boot enabled (default)"
+                                },
+                                {
+                                    "name": "Partition1",
+                                    "value": 1,
+                                    "description": "Boot partition 1 enabled for boot"
+                                },
+                                {
+                                    "name": "Partition2",
+                                    "value": 2,
+                                    "description": "Boot partition 2 enabled for boot"
+                                },
+                                {
+                                    "name": "UserAera",
+                                    "value": 7,
+                                    "description": "User area enabled for boot"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 1
+                        },
+                        {
+                            "id": "field000-bits24-26",
+                            "width": 3,
+                            "name": "PartitionAccess",
+                            "access": "RW",
+                            "description": "eMMC card partition to be accessed(BOOT_PARTITION_ACCESS in Extended CSD)",
+                            "values": [
+                                {
+                                    "name": "PartitionUserAera",
+                                    "value": 0,
+                                    "description": "No access to boot partition (default), normal partition"
+                                },
+                                {
+                                    "name": "PartitionBoot1",
+                                    "value": 1,
+                                    "description": "Read/Write boot partition 1"
+                                },
+                                {
+                                    "name": "PartitionBoot2",
+                                    "value": 2,
+                                    "description": "Read/Write boot partition 2"
+                                },
+                                {
+                                    "name": "RPMB",
+                                    "value": 3,
+                                    "description": "Replay protected mem block"
+                                },
+                                {
+                                    "name": "GeneralPurposePartition1",
+                                    "value": 4,
+                                    "description": "access to general purpose partition 1"
+                                },
+                                {
+                                    "name": "GeneralPurposePartition2",
+                                    "value": 5,
+                                    "description": "access to general purpose partition 2"
+                                },
+                                {
+                                    "name": "GeneralPurposePartition3",
+                                    "value": 6,
+                                    "description": "access to general purpose partition 3"
+                                },
+                                {
+                                    "name": "GeneralPurposePartition4",
+                                    "value": 7,
+                                    "description": "access to general purpose partition 4"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 1
+                        },
+                        {
+                            "width": 4
+                        }
+                    ]
+                },
+                {
+                    "id": "field004",
+                    "offset_int": "0x4",
+                    "reg_width": 32,
+                    "name": "ConfigOption1",
+                    "description": "eMMC card Configuration Option 1 - Optional",
+                    "default_value_int": "0x0",
+                    "bitfields": [
+                        {
+                            "width": 19
+                        },
+                        {
+                            "id": "field004-bit19",
+                            "width": 1,
+                            "name": "EnablePowerCycle",
+                            "access": "RW",
+                            "description": "Execute power cycle before initialization",
+                            "values": [
+                                {
+                                    "name": "Disabled",
+                                    "value": 0,
+                                    "description": "Power cycle disabled"
+                                },
+                                {
+                                    "name": "Enabled",
+                                    "value": 1,
+                                    "description": "Execute power cycle before initialization"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field004-bit20",
+                            "width": 1,
+                            "name": "PowerUpDelay",
+                            "access": "RW",
+                            "description": "Set power up delay",
+                            "values": [
+                                {
+                                    "name": "5ms",
+                                    "value": 0,
+                                    "description": "Power up delay 5ms"
+                                },
+                                {
+                                    "name": "2.5ms",
+                                    "value": 1,
+                                    "description": "Power up delay 2.5ms"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 2
+                        },
+                        {
+                            "id": "field004-bit23",
+                            "width": 1,
+                            "name": "PowerUpPolarity",
+                            "access": "RW",
+                            "description": "eMMC power control polarity. Only valid when PWR_CYCLE_ENABLE is enabled",
+                            "values": [
+                                {
+                                    "name": "Low",
+                                    "value": 0,
+                                    "description": "Power down when uSDHC.RST set low"
+                                },
+                                {
+                                    "name": "High",
+                                    "value": 1,
+                                    "description": "Power down when uSDHC.RST set high"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field004-bits24-25",
+                            "width": 2,
+                            "name": "PowerDownTime",
+                            "access": "RW",
+                            "description": "Set power down time",
+                            "values": [
+                                {
+                                    "name": "20ms",
+                                    "value": 0,
+                                    "description": "Power up delay 20ms"
+                                },
+                                {
+                                    "name": "10ms",
+                                    "value": 1,
+                                    "description": "Power up delay 10ms"
+                                },
+                                {
+                                    "name": "5ms",
+                                    "value": 2,
+                                    "description": "Power up delay 5ms"
+                                },
+                                {
+                                    "name": "2.5ms",
+                                    "value": 3,
+                                    "description": "Power up delay 2.5ms"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 2
+                        },
+                        {
+                            "width": 4
+                        }
+                    ]
+                }
+            ]
+        }
+    ]
+}

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/memcfg/opt_word_flexspi_nand.json

@@ -0,0 +1,276 @@
+{
+    "cpu": "General",
+    "groups": [
+        {
+            "group": {
+                "name": "General regs",
+                "description": "General register generated by SPSDK"
+            },
+            "registers": [
+                {
+                    "id": "field000",
+                    "offset_int": "0x0",
+                    "reg_width": 32,
+                    "name": "ConfigOption0",
+                    "description": "FlexSPI NAND Configuration Option 0",
+                    "default_value_int": "0xc0000020",
+                    "bitfields": [
+                        {
+                            "id": "field000-bits0-3",
+                            "width": 4,
+                            "name": "MaxFreq",
+                            "access": "RW",
+                            "description": "The maximum work frequency for specified Flash device",
+                            "values": [
+                                {
+                                    "name": "NoChange",
+                                    "value": 0,
+                                    "description": "Don't change FlexSPI clock setting"
+                                },
+                                {
+                                    "name": "30Mhz",
+                                    "value": 1,
+                                    "description": "30MHz"
+                                },
+                                {
+                                    "name": "50Mhz",
+                                    "value": 2,
+                                    "description": "50MHz"
+                                },
+                                {
+                                    "name": "60Mhz",
+                                    "value": 3,
+                                    "description": "60MHz"
+                                },
+                                {
+                                    "name": "80Mhz",
+                                    "value": 4,
+                                    "description": "80MHz"
+                                },
+                                {
+                                    "name": "100Mhz",
+                                    "value": 5,
+                                    "description": "100MHz"
+                                },
+                                {
+                                    "name": "120Mhz",
+                                    "value": 6,
+                                    "description": "120MHz"
+                                },
+                                {
+                                    "name": "133Mhz",
+                                    "value": 7,
+                                    "description": "133MHz"
+                                },
+                                {
+                                    "name": "166Mhz",
+                                    "value": 8,
+                                    "description": "166MHz"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits4-7",
+                            "width": 4,
+                            "name": "PageSize",
+                            "access": "RW",
+                            "description": "Specify page size in KB.",
+                            "values": [
+                                {
+                                    "name": "2KB",
+                                    "value": 2,
+                                    "description": "NAND is using 2KB pages"
+                                },
+                                {
+                                    "name": "4KB",
+                                    "value": 4,
+                                    "description": "NAND is using 4KB pages"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits8-11",
+                            "width": 4,
+                            "name": "PagesPerBlock",
+                            "access": "RW",
+                            "description": "Specify the count of pages per one block",
+                            "values": [
+                                {
+                                    "name": "64",
+                                    "value": 0,
+                                    "description": "64 pages per one block"
+                                },
+                                {
+                                    "name": "128",
+                                    "value": 1,
+                                    "description": "128 pages per one block"
+                                },
+                                {
+                                    "name": "256",
+                                    "value": 2,
+                                    "description": "256 pages per one block"
+                                },
+                                {
+                                    "name": "32",
+                                    "value": 3,
+                                    "description": "32 pages per one block"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits12-15",
+                            "width": 4,
+                            "name": "HasMultiPlanes",
+                            "access": "RW",
+                            "description": "Has or no multiplanes",
+                            "values": [
+                                {
+                                    "name": "Disabled",
+                                    "value": 0,
+                                    "description": "NAND memory has not multiplanes"
+                                },
+                                {
+                                    "name": "Enabled",
+                                    "value": 1,
+                                    "description": "NAND memory has multiplanes"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits16-19",
+                            "width": 4,
+                            "name": "FlashSize",
+                            "access": "RW",
+                            "description": "Overall flash size",
+                            "values": [
+                                {
+                                    "name": "512Mbit",
+                                    "value": 0,
+                                    "description": "Memory size is 512Mbit"
+                                },
+                                {
+                                    "name": "1Gbit",
+                                    "value": 1,
+                                    "description": "Memory size is 1Gbit"
+                                },
+                                {
+                                    "name": "2Gbit",
+                                    "value": 2,
+                                    "description": "Memory size is 2Gbit"
+                                },
+                                {
+                                    "name": "4Gbit",
+                                    "value": 4,
+                                    "description": "Memory size is 4Gbit"
+                                },
+                                {
+                                    "name": "8Gbit",
+                                    "value": 8,
+                                    "description": "Memory size is 8Gbit"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits20-23",
+                            "width": 4,
+                            "name": "DeviceType",
+                            "access": "RW",
+                            "description": "Device type of NAND.",
+                            "values": [
+                                {
+                                    "name": "QuadSpi",
+                                    "value": 0,
+                                    "description": "QuadSPI NAND"
+                                },
+                                {
+                                    "name": "Octal",
+                                    "value": 1,
+                                    "description": "OctalSPI NAND"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits24-27",
+                            "width": 4,
+                            "name": "OptionSize",
+                            "access": "RW",
+                            "description": "Option Size",
+                            "values": [
+                                {
+                                    "name": "OptionSize1",
+                                    "value": 0,
+                                    "description": "Option words = 1"
+                                },
+                                {
+                                    "name": "OptionSize2",
+                                    "value": 1,
+                                    "description": "Option words = 2"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 4
+                        }
+                    ]
+                },
+                {
+                    "id": "field004",
+                    "offset_int": "0x4",
+                    "reg_width": 32,
+                    "name": "ConfigOption1",
+                    "description": "FlexSPI NAND flash Configuration Option 1 - Optional",
+                    "default_value_int": "0x0",
+                    "bitfields": [
+                        {
+                            "id": "field004-bits0-7",
+                            "width": 8,
+                            "name": "ManufacturerId",
+                            "access": "RW",
+                            "description": "Manufacture ID"
+                        },
+                        {
+                            "id": "field004-bits8-15",
+                            "width": 8,
+                            "name": "EccFailureMask",
+                            "access": "RW",
+                            "description": "ECC Failure mask"
+                        },
+                        {
+                            "id": "field004-bits16-23",
+                            "width": 8,
+                            "name": "EccCheckMask",
+                            "access": "RW",
+                            "description": "ECC Check Mask"
+                        },
+                        {
+                            "id": "field004-bits24-27",
+                            "width": 4,
+                            "name": "PinMuxGroup",
+                            "access": "RW",
+                            "description": "Select the FlexSPI Pin MUx group"
+                        },
+                        {
+                            "id": "field004-bits28-31",
+                            "width": 4,
+                            "name": "FlashConnection",
+                            "access": "RW",
+                            "description": "Select the FlexSPI Port A/B",
+                            "values": [
+                                {
+                                    "name": "SingleFlashPort_A",
+                                    "value": 0,
+                                    "description": "Single Flash connected to port A"
+                                },
+                                {
+                                    "name": "SingleFlashPort_B",
+                                    "value": 2,
+                                    "description": "Single Flash connected to port B"
+                                }
+                            ]
+                        }
+                    ]
+                }
+            ]
+        }
+    ]
+}

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/memcfg/opt_word_flexspi_nor.json

@@ -0,0 +1,338 @@
+{
+    "cpu": "General",
+    "groups": [
+        {
+            "group": {
+                "name": "General regs",
+                "description": "General register generated by SPSDK"
+            },
+            "registers": [
+                {
+                    "id": "field000",
+                    "offset_int": "0x0",
+                    "reg_width": 32,
+                    "name": "ConfigOption0",
+                    "description": "FlexSPI NOR Configuration Option 0",
+                    "default_value_int": "0xc0000000",
+                    "bitfields": [
+                        {
+                            "id": "field000-bits0-3",
+                            "width": 4,
+                            "name": "MaxFreq",
+                            "access": "RW",
+                            "description": "The maximum work frequency for specified Flash device",
+                            "values": [
+                                {
+                                    "name": "NoChange",
+                                    "value": 0,
+                                    "description": "Don't change FlexSPI clock setting"
+                                },
+                                {
+                                    "name": "30Mhz",
+                                    "value": 1,
+                                    "description": "30MHz"
+                                },
+                                {
+                                    "name": "50Mhz",
+                                    "value": 2,
+                                    "description": "50MHz"
+                                },
+                                {
+                                    "name": "60Mhz",
+                                    "value": 3,
+                                    "description": "60MHz"
+                                },
+                                {
+                                    "name": "75Mhz",
+                                    "value": 4,
+                                    "description": "75MHz"
+                                },
+                                {
+                                    "name": "80Mhz",
+                                    "value": 5,
+                                    "description": "80MHz"
+                                },
+                                {
+                                    "name": "100Mhz",
+                                    "value": 6,
+                                    "description": "100MHz"
+                                },
+                                {
+                                    "name": "133Mhz",
+                                    "value": 7,
+                                    "description": "133MHz"
+                                },
+                                {
+                                    "name": "166Mhz",
+                                    "value": 8,
+                                    "description": "166MHz"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits4-7",
+                            "width": 4,
+                            "name": "Misc",
+                            "access": "RW",
+                            "description": "Specify miscellaneous mode for selected flash type; Experimental feature, do not use in products, keep it as 0.",
+                            "values": [
+                                {
+                                    "name": "NotEnabled",
+                                    "value": 0,
+                                    "description": "Miscellaneous mode is not enabled"
+                                },
+                                {
+                                    "name": "Mode0-4-4",
+                                    "value": 1,
+                                    "description": "Enable 0-4-4 mode for High Random Read performance"
+                                },
+                                {
+                                    "name": "SwappedMode",
+                                    "value": 3,
+                                    "description": " Data Order Swapped mode (for MXIC OctaFlash only)"
+                                },
+                                {
+                                    "name": "InternalLoopBack",
+                                    "value": 5,
+                                    "description": " Select the FlexSPI data sample source as internal loop back, more details please refer FlexSPI usage"
+                                },
+                                {
+                                    "name": "StandSpiMode",
+                                    "value": 6,
+                                    "description": " Config the FlexSPI NOR flash running at stand SPI mode"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits8-11",
+                            "width": 4,
+                            "name": "QuadEnableType",
+                            "access": "RW",
+                            "description": "Specify the Quad Enable sequence, only applicable for device that only JESD216 compliant, this field is ignored if device support JESD216A or later version. This field will be effective only if device is compliant with JESD216 only (9 longword SDFP table)",
+                            "values": [
+                                {
+                                    "name": "NotConfigure",
+                                    "value": 0,
+                                    "description": "Not Configured"
+                                },
+                                {
+                                    "name": "Bit6InSR1",
+                                    "value": 1,
+                                    "description": "QE bit is bit6 in StatusReg1"
+                                },
+                                {
+                                    "name": "Bit1InSR2",
+                                    "value": 2,
+                                    "description": "QE bit is bit1 in StatusReg2"
+                                },
+                                {
+                                    "name": "Bit7InSR2",
+                                    "value": 3,
+                                    "description": "QE bit is bit7 in StatusReg2"
+                                },
+                                {
+                                    "name": "Bit1InSR2EnableCmdIs0x31",
+                                    "value": 4,
+                                    "description": "QE bit is bit1 in StatusReg2, enable command is 0x31"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits12-15",
+                            "width": 4,
+                            "name": "CMDPad(s)",
+                            "access": "RW",
+                            "description": "Commands pads for the Flash device (1/4/8), for device that works under 1-1-4,1-4-4,1-1-8 or 1-8-8 mode, CMD pad(s) value is always 0x0, for devices that only support 4-4-4 mode for high performance, CMD pads value is 2, for devices that only support 8-8-8 mode for high performance, CMD pads value is 3",
+                            "values": [
+                                {
+                                    "name": "1",
+                                    "value": 0,
+                                    "description": "1 bit"
+                                },
+                                {
+                                    "name": "4",
+                                    "value": 2,
+                                    "description": "4 bits"
+                                },
+                                {
+                                    "name": "8",
+                                    "value": 3,
+                                    "description": "8 bits"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits16-19",
+                            "width": 4,
+                            "name": "Query CMDPad(s)",
+                            "access": "RW",
+                            "description": "Command pads (1/4/8) for the SFDP command",
+                            "values": [
+                                {
+                                    "name": "1",
+                                    "value": 0,
+                                    "description": "1 bit"
+                                },
+                                {
+                                    "name": "4",
+                                    "value": 2,
+                                    "description": "4 bits"
+                                },
+                                {
+                                    "name": "8",
+                                    "value": 3,
+                                    "description": "8 bits"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits20-23",
+                            "width": 4,
+                            "name": "Device Detection Type",
+                            "access": "RW",
+                            "description": "SW defined device types used for config block autodetection",
+                            "values": [
+                                {
+                                    "name": "QuadSPI_SDR",
+                                    "value": 0,
+                                    "description": "QuadSPI SDR"
+                                },
+                                {
+                                    "name": "QuadSPI_DDR",
+                                    "value": 1,
+                                    "description": "QuadSPI DDR"
+                                },
+                                {
+                                    "name": "HyperFLASH_1V8",
+                                    "value": 2,
+                                    "description": "HyperFLASH 1V8"
+                                },
+                                {
+                                    "name": "HyperFLASH_3V",
+                                    "value": 3,
+                                    "description": "HyperFLASH 3V"
+                                },
+                                {
+                                    "name": "MXICOPI_DDR",
+                                    "value": 4,
+                                    "description": "MXICOPI DDR"
+                                },
+                                {
+                                    "name": "MicronOPI_DDR",
+                                    "value": 6,
+                                    "description": "MicronOPI DDR"
+                                },
+                                {
+                                    "name": "MicronOPI_SDR",
+                                    "value": 7,
+                                    "description": "MicronOPI SDR"
+                                },
+                                {
+                                    "name": "AdestoOPI_DDR",
+                                    "value": 8,
+                                    "description": "AdestoOPI DDR"
+                                },
+                                {
+                                    "name": "AdestoOPI_SDR",
+                                    "value": 9,
+                                    "description": "AdestoOPI SDR"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits24-27",
+                            "width": 4,
+                            "name": "OptionSize",
+                            "access": "RW",
+                            "description": "Option Size",
+                            "values": [
+                                {
+                                    "name": "OptionSize1",
+                                    "value": 0,
+                                    "description": "Option words = 1"
+                                },
+                                {
+                                    "name": "OptionSize2",
+                                    "value": 1,
+                                    "description": "Option words = 2"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 4
+                        }
+                    ]
+                },
+                {
+                    "id": "field004",
+                    "offset_int": "0x4",
+                    "reg_width": 32,
+                    "name": "ConfigOption1",
+                    "description": "FlexSPI NOR Flash Configuration Option 1 - Optional",
+                    "default_value_int": "0x0",
+                    "bitfields": [
+                        {
+                            "id": "field004-bits0-7",
+                            "width": 8,
+                            "name": "DummyCycles",
+                            "access": "RW",
+                            "description": "User provided dummy cycles for SDR/DDR read command: 0 - Auto detection, Others - Specified dummy cycles"
+                        },
+                        {
+                            "id": "field004-bits8-15",
+                            "width": 8,
+                            "name": "StatusOverride",
+                            "access": "RW",
+                            "description": "Override status register value during device mode configuration"
+                        },
+                        {
+                            "id": "field004-bits16-19",
+                            "width": 4,
+                            "name": "PinMuxGroup",
+                            "access": "RW",
+                            "description": "Pin multiplexer group selection"
+                        },
+                        {
+                            "id": "field004-bits20-23",
+                            "width": 4,
+                            "name": "DqsPinMuxGroup",
+                            "access": "RW",
+                            "description": "DQS Pin multiplexer group selection"
+                        },
+                        {
+                            "id": "field004-bits24-27",
+                            "width": 4,
+                            "name": "PinDriveStrength",
+                            "access": "RW",
+                            "description": "The Drive Strength of FlexSPI Pads"
+                        },
+                        {
+                            "id": "field004-bits28-31",
+                            "width": 4,
+                            "name": "FlashConnection",
+                            "access": "RW",
+                            "description": "Select the FlexSPI Port A/B",
+                            "values": [
+                                {
+                                    "name": "SingleFlashPort_A",
+                                    "value": 0,
+                                    "description": "Single Flash connected to port A"
+                                },
+                                {
+                                    "name": "ParallelMode",
+                                    "value": 1,
+                                    "description": "Parallel mode"
+                                },
+                                {
+                                    "name": "SingleFlashPort_B",
+                                    "value": 2,
+                                    "description": "Single Flash connected to port B"
+                                }
+                            ]
+                        }
+                    ]
+                }
+            ]
+        }
+    ]
+}

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/memcfg/opt_word_flexspi_nor_legacy.json

@@ -0,0 +1,273 @@
+{
+    "cpu": "General",
+    "groups": [
+        {
+            "group": {
+                "name": "General regs",
+                "description": "General register generated by SPSDK"
+            },
+            "registers": [
+                {
+                    "id": "field000",
+                    "offset_int": "0x0",
+                    "reg_width": 32,
+                    "name": "ConfigOption0",
+                    "description": "FlexSPI NOR Configuration Option 0",
+                    "default_value_int": "0xc0000000",
+                    "bitfields": [
+                        {
+                            "id": "field000-bits0-3",
+                            "width": 4,
+                            "name": "MaxFreq",
+                            "access": "RW",
+                            "description": "The maximum work frequency for specified Flash device; 0 - Don't change FlexSPI clock setting"
+                        },
+                        {
+                            "id": "field000-bits4-7",
+                            "width": 4,
+                            "name": "Misc",
+                            "access": "RW",
+                            "description": "Specify miscellaneous mode for selected flash type; Experimental feature, do not use in products, keep it as 0.",
+                            "values": [
+                                {
+                                    "name": "NotEnabled",
+                                    "value": 0,
+                                    "description": "Miscellaneous mode is not enabled"
+                                },
+                                {
+                                    "name": "Mode0-4-4",
+                                    "value": 1,
+                                    "description": "Enable 0-4-4 mode for High Random Read performance"
+                                },
+                                {
+                                    "name": "SwappedMode",
+                                    "value": 3,
+                                    "description": " Data Order Swapped mode (for MXIC OctaFlash only)"
+                                },
+                                {
+                                    "name": "InternalLoopBack",
+                                    "value": 5,
+                                    "description": " Select the FlexSPI data sample source as internal loop back, more details please refer FlexSPI usage"
+                                },
+                                {
+                                    "name": "StandSpiMode",
+                                    "value": 6,
+                                    "description": " Config the FlexSPI NOR flash running at stand SPI mode"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits8-11",
+                            "width": 4,
+                            "name": "QuadEnableType",
+                            "access": "RW",
+                            "description": "Specify the Quad Enable sequence, only applicable for device that only JESD216 compliant, this field is ignored if device support JESD216A or later version. This field will be effective only if device is compliant with JESD216 only (9 longword SDFP table)",
+                            "values": [
+                                {
+                                    "name": "NotConfigure",
+                                    "value": 0,
+                                    "description": "Not Configured"
+                                },
+                                {
+                                    "name": "Bit6InSR1",
+                                    "value": 1,
+                                    "description": "QE bit is bit6 in StatusReg1"
+                                },
+                                {
+                                    "name": "Bit1InSR2",
+                                    "value": 2,
+                                    "description": "QE bit is bit1 in StatusReg2"
+                                },
+                                {
+                                    "name": "Bit7InSR2",
+                                    "value": 3,
+                                    "description": "QE bit is bit7 in StatusReg2"
+                                },
+                                {
+                                    "name": "Bit1InSR2EnableCmdIs0x31",
+                                    "value": 4,
+                                    "description": "QE bit is bit1 in StatusReg2, enable command is 0x31"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits12-15",
+                            "width": 4,
+                            "name": "CMDPad(s)",
+                            "access": "RW",
+                            "description": "Commands pads for the Flash device (1/4/8), for device that works under 1-1-4,1-4-4,1-1-8 or 1-8-8 mode, CMD pad(s) value is always 0x0, for devices that only support 4-4-4 mode for high performance, CMD pads value is 2, for devices that only support 8-8-8 mode for high performance, CMD pads value is 3",
+                            "values": [
+                                {
+                                    "name": "1",
+                                    "value": 0,
+                                    "description": "1 bit"
+                                },
+                                {
+                                    "name": "4",
+                                    "value": 2,
+                                    "description": "4 bits"
+                                },
+                                {
+                                    "name": "8",
+                                    "value": 3,
+                                    "description": "8 bits"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits16-19",
+                            "width": 4,
+                            "name": "QueryCMDPad(s)",
+                            "access": "RW",
+                            "description": "Command pads (1/4/8) for the SFDP command",
+                            "values": [
+                                {
+                                    "name": "1",
+                                    "value": 0,
+                                    "description": "1 bit"
+                                },
+                                {
+                                    "name": "4",
+                                    "value": 2,
+                                    "description": "4 bits"
+                                },
+                                {
+                                    "name": "8",
+                                    "value": 3,
+                                    "description": "8 bits"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits20-23",
+                            "width": 4,
+                            "name": "DeviceDetectionType",
+                            "access": "RW",
+                            "description": "SW defined device types used for config block autodetection",
+                            "values": [
+                                {
+                                    "name": "QuadSPI_SDR",
+                                    "value": 0,
+                                    "description": "QuadSPI SDR"
+                                },
+                                {
+                                    "name": "QuadSPI_DDR",
+                                    "value": 1,
+                                    "description": "QuadSPI DDR"
+                                },
+                                {
+                                    "name": "HyperFLASH_1V8",
+                                    "value": 2,
+                                    "description": "HyperFLASH 1V8"
+                                },
+                                {
+                                    "name": "HyperFLASH_3V",
+                                    "value": 3,
+                                    "description": "HyperFLASH 3V"
+                                },
+                                {
+                                    "name": "MXICOPI_DDR",
+                                    "value": 4,
+                                    "description": "MXICOPI DDR"
+                                },
+                                {
+                                    "name": "MicronOPI_DDR",
+                                    "value": 6,
+                                    "description": "MicronOPI DDR"
+                                },
+                                {
+                                    "name": "MicronOPI_SDR",
+                                    "value": 7,
+                                    "description": "MicronOPI SDR"
+                                },
+                                {
+                                    "name": "AdestoOPI_DDR",
+                                    "value": 8,
+                                    "description": "AdestoOPI DDR"
+                                },
+                                {
+                                    "name": "AdestoOPI_SDR",
+                                    "value": 9,
+                                    "description": "AdestoOPI SDR"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits24-27",
+                            "width": 4,
+                            "name": "OptionSize",
+                            "access": "RW",
+                            "description": "Option Size",
+                            "values": [
+                                {
+                                    "name": "OptionSize1",
+                                    "value": 0,
+                                    "description": "Option words = 1"
+                                },
+                                {
+                                    "name": "OptionSize2",
+                                    "value": 1,
+                                    "description": "Option words = 2"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 4
+                        }
+                    ]
+                },
+                {
+                    "id": "field004",
+                    "offset_int": "0x4",
+                    "reg_width": 32,
+                    "name": "ConfigOption1",
+                    "description": "FlexSPI NOR Flash Configuration Option 1 - Optional",
+                    "default_value_int": "0x0",
+                    "bitfields": [
+                        {
+                            "id": "field004-bits0-7",
+                            "width": 8,
+                            "name": "DummyCycles",
+                            "access": "RW",
+                            "description": "User provided dummy cycles for SDR/DDR read command: 0 - Auto detection, Others - Specified dummy cycles"
+                        },
+                        {
+                            "id": "field004-bits8-15",
+                            "width": 8,
+                            "name": "StatusOverride",
+                            "access": "RW",
+                            "description": "Override status register value during device mode configuration"
+                        },
+                        {
+                            "width": 8
+                        },
+                        {
+                            "id": "field004-bits24-31",
+                            "width": 8,
+                            "name": "FlashConnection",
+                            "access": "RW",
+                            "description": "Select the FlexSPI Port A/B",
+                            "values": [
+                                {
+                                    "name": "SingleFlashPort_A",
+                                    "value": 0,
+                                    "description": "Single Flash connected to port A"
+                                },
+                                {
+                                    "name": "ParallelMode",
+                                    "value": 1,
+                                    "description": "Parallel mode"
+                                },
+                                {
+                                    "name": "SingleFlashPort_B",
+                                    "value": 2,
+                                    "description": "Single Flash connected to port B"
+                                }
+                            ]
+                        }
+                    ]
+                }
+            ]
+        }
+    ]
+}

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/memcfg/opt_word_mmc.json

@@ -0,0 +1,430 @@
+{
+    "cpu": "General",
+    "groups": [
+        {
+            "group": {
+                "name": "General regs",
+                "description": "General register generated by SPSDK"
+            },
+            "registers": [
+                {
+                    "id": "field000",
+                    "offset_int": "0x0",
+                    "reg_width": 32,
+                    "name": "ConfigOption0",
+                    "description": "MMC card Configuration Option 0",
+                    "default_value_int": "0xc0000000",
+                    "bitfields": [
+                        {
+                            "id": "field000-bit0",
+                            "width": 1,
+                            "name": "BootConfigEnable",
+                            "access": "RW",
+                            "description": "Boot configuration",
+                            "values": [
+                                {
+                                    "name": "Disabled",
+                                    "value": 0,
+                                    "description": "Boot configuration disabled"
+                                },
+                                {
+                                    "name": "Enabled",
+                                    "value": 1,
+                                    "description": "Boot configuration enabled"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 1
+                        },
+                        {
+                            "id": "field000-bit2",
+                            "width": 1,
+                            "name": "BootAcknowledge",
+                            "access": "RW",
+                            "description": "Boot acknowledge",
+                            "values": [
+                                {
+                                    "name": "Disabled",
+                                    "value": 0,
+                                    "description": "Boot acknowledge disabled"
+                                },
+                                {
+                                    "name": "Enabled",
+                                    "value": 1,
+                                    "description": "Boot acknowledge enabled"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bit3",
+                            "width": 1,
+                            "name": "ResetBootBusConditions",
+                            "access": "RW",
+                            "description": "Reset boot BUS conditions",
+                            "values": [
+                                {
+                                    "name": "Disabled",
+                                    "value": 0,
+                                    "description": "Don't change BUS conditions"
+                                },
+                                {
+                                    "name": "Enabled",
+                                    "value": 1,
+                                    "description": "Reset boot BUS conditions"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits4-5",
+                            "width": 2,
+                            "name": "BootMode",
+                            "access": "RW",
+                            "description": "Boot mode configuration",
+                            "values": [
+                                {
+                                    "name": "SDRWithDefaultTiming",
+                                    "value": 0,
+                                    "description": "Single data rate with backward compatible timings"
+                                },
+                                {
+                                    "name": "SDRWithHighSpeedTiming",
+                                    "value": 1,
+                                    "description": "Single data rate with high speed timing"
+                                },
+                                {
+                                    "name": "DDRTiming",
+                                    "value": 2,
+                                    "description": "Dual date rate"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 2
+                        },
+                        {
+                            "id": "field000-bits8-11",
+                            "width": 4,
+                            "name": "BusWidth",
+                            "access": "RW",
+                            "description": "MMC card data bus width(BUS_WIDTH in Extended CSD)",
+                            "values": [
+                                {
+                                    "name": "1bit",
+                                    "value": 0,
+                                    "description": "MMC data bus width is 1 bit"
+                                },
+                                {
+                                    "name": "4bit",
+                                    "value": 1,
+                                    "description": "MMC data bus width is 4 bits"
+                                },
+                                {
+                                    "name": "8bit",
+                                    "value": 2,
+                                    "description": "MMC data bus width is 8 bits"
+                                },
+                                {
+                                    "name": "4bitDDR",
+                                    "value": 5,
+                                    "description": "MMC data bus width is 4 bits ddr"
+                                },
+                                {
+                                    "name": "8bitDDR",
+                                    "value": 6,
+                                    "description": "MMC data bus width is 8 bits ddr"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits12-15",
+                            "width": 4,
+                            "name": "TimingMode",
+                            "access": "RW",
+                            "description": "MMC card high-speed timing(HS_TIMING in Extended CSD)",
+                            "values": [
+                                {
+                                    "name": "HighSpeedTimingNone",
+                                    "value": 0,
+                                    "description": "MMC card using none high-speed timing"
+                                },
+                                {
+                                    "name": "HighSpeedTiming",
+                                    "value": 1,
+                                    "description": "MMC card using high-speed timing"
+                                },
+                                {
+                                    "name": "HighSpeed200Timing",
+                                    "value": 2,
+                                    "description": "MMC card high speed 200 timing"
+                                },
+                                {
+                                    "name": "HighSpeed400Timing",
+                                    "value": 3,
+                                    "description": "MMC card high speed 400 timing"
+                                },
+                                {
+                                    "name": "HighSpeed26MHZTiming",
+                                    "value": 4,
+                                    "description": "MMC high speed 26MHZ timing"
+                                },
+                                {
+                                    "name": "HighSpeed52MHZTiming",
+                                    "value": 5,
+                                    "description": "MMC high speed 52MHZ timing"
+                                },
+                                {
+                                    "name": "HighSpeedDDR52Timing",
+                                    "value": 6,
+                                    "description": "MMC high speed timing DDR52 1.8V"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits16-17",
+                            "width": 2,
+                            "name": "BootBusWidth",
+                            "access": "RW",
+                            "description": "MMC card boot bus width(BOOT_BUS_WIDTH in Extended CSD)",
+                            "values": [
+                                {
+                                    "name": "1bitSDR4bitDDR",
+                                    "value": 0,
+                                    "description": "x1 (sdr) or x4 (ddr) bus width in boot operation mode(default)"
+                                },
+                                {
+                                    "name": "4bitSDR4bitDDR",
+                                    "value": 1,
+                                    "description": "x4 (sdr/ddr) bus width in boot operation mode"
+                                },
+                                {
+                                    "name": "8bitSDR8bitDDR",
+                                    "value": 2,
+                                    "description": "x8 (sdr/ddr) bus width in boot operation mode"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 2
+                        },
+                        {
+                            "id": "field000-bits20-22",
+                            "width": 3,
+                            "name": "BootPartitionEnabled",
+                            "access": "RW",
+                            "description": "MMC card boot partition enabled(BOOT_PARTITION_ENABLE in Extended CSD)",
+                            "values": [
+                                {
+                                    "name": "Not",
+                                    "value": 0,
+                                    "description": "Device not boot enabled (default)"
+                                },
+                                {
+                                    "name": "Partition1",
+                                    "value": 1,
+                                    "description": "Boot partition 1 enabled for boot"
+                                },
+                                {
+                                    "name": "Partition2",
+                                    "value": 2,
+                                    "description": "Boot partition 2 enabled for boot"
+                                },
+                                {
+                                    "name": "UserAera",
+                                    "value": 7,
+                                    "description": "User area enabled for boot"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 1
+                        },
+                        {
+                            "id": "field000-bits24-26",
+                            "width": 3,
+                            "name": "PartitionAccess",
+                            "access": "RW",
+                            "description": "MMC card partition to be accessed(BOOT_PARTITION_ACCESS in Extended CSD)",
+                            "values": [
+                                {
+                                    "name": "PartitionUserAera",
+                                    "value": 0,
+                                    "description": "No access to boot partition (default), normal partition"
+                                },
+                                {
+                                    "name": "PartitionBoot1",
+                                    "value": 1,
+                                    "description": "Read/Write boot partition 1"
+                                },
+                                {
+                                    "name": "PartitionBoot2",
+                                    "value": 2,
+                                    "description": "Read/Write boot partition 2"
+                                },
+                                {
+                                    "name": "RPMB",
+                                    "value": 3,
+                                    "description": "Replay protected mem block"
+                                },
+                                {
+                                    "name": "GeneralPurposePartition1",
+                                    "value": 4,
+                                    "description": "access to general purpose partition 1"
+                                },
+                                {
+                                    "name": "GeneralPurposePartition2",
+                                    "value": 5,
+                                    "description": "access to general purpose partition 2"
+                                },
+                                {
+                                    "name": "GeneralPurposePartition3",
+                                    "value": 6,
+                                    "description": "access to general purpose partition 3"
+                                },
+                                {
+                                    "name": "GeneralPurposePartition4",
+                                    "value": 7,
+                                    "description": "access to general purpose partition 4"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 1
+                        },
+                        {
+                            "width": 4
+                        }
+                    ]
+                },
+                {
+                    "id": "field004",
+                    "offset_int": "0x4",
+                    "reg_width": 32,
+                    "name": "ConfigOption1",
+                    "description": "MMC card Configuration Option 1 - Optional",
+                    "default_value_int": "0x0",
+                    "bitfields": [
+                        {
+                            "id": "field004-bits0-3",
+                            "width": 4,
+                            "name": "Instance",
+                            "access": "RW",
+                            "description": "MMC peripheral instance"
+                        },
+                        {
+                            "width": 2
+                        },
+                        {
+                            "width": 10
+                        },
+                        {
+                            "width": 2
+                        },
+                        {
+                            "id": "field004-bit18",
+                            "width": 1,
+                            "name": "1V8",
+                            "access": "RW",
+                            "description": "MMC interface BUS use 1V8",
+                            "values": [
+                                {
+                                    "name": "Disabled",
+                                    "value": 0,
+                                    "description": "1V8 disabled"
+                                },
+                                {
+                                    "name": "Enabled",
+                                    "value": 1,
+                                    "description": "1V8 enabled"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field004-bit19",
+                            "width": 1,
+                            "name": "EnablePowerCycle",
+                            "access": "RW",
+                            "description": "Execute power cycle before initialization",
+                            "values": [
+                                {
+                                    "name": "Disabled",
+                                    "value": 0,
+                                    "description": "Power cycle disabled"
+                                },
+                                {
+                                    "name": "Enabled",
+                                    "value": 1,
+                                    "description": "Execute power cycle before initialization"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field004-bit20",
+                            "width": 1,
+                            "name": "PowerUpDelay",
+                            "access": "RW",
+                            "description": "Set power up delay",
+                            "values": [
+                                {
+                                    "name": "5ms",
+                                    "value": 0,
+                                    "description": "Power up delay 5ms"
+                                },
+                                {
+                                    "name": "2.5ms",
+                                    "value": 1,
+                                    "description": "Power up delay 2.5ms"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 2
+                        },
+                        {
+                            "id": "field004-bit23",
+                            "width": 1,
+                            "name": "PowerUpPolarity",
+                            "access": "RW",
+                            "description": "Power up polarity - May vary on different devices"
+                        },
+                        {
+                            "id": "field004-bits24-25",
+                            "width": 2,
+                            "name": "PowerDownTime",
+                            "access": "RW",
+                            "description": "Set power down time",
+                            "values": [
+                                {
+                                    "name": "20ms",
+                                    "value": 0,
+                                    "description": "Power up delay 20ms"
+                                },
+                                {
+                                    "name": "10ms",
+                                    "value": 1,
+                                    "description": "Power up delay 10ms"
+                                },
+                                {
+                                    "name": "5ms",
+                                    "value": 2,
+                                    "description": "Power up delay 5ms"
+                                },
+                                {
+                                    "name": "2.5ms",
+                                    "value": 3,
+                                    "description": "Power up delay 2.5ms"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 2
+                        },
+                        {
+                            "width": 4
+                        }
+                    ]
+                }
+            ]
+        }
+    ]
+}

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/memcfg/opt_word_sd.json

@@ -0,0 +1,183 @@
+{
+    "cpu": "General",
+    "groups": [
+        {
+            "group": {
+                "name": "General regs",
+                "description": "General register generated by SPSDK"
+            },
+            "registers": [
+                {
+                    "id": "field000",
+                    "offset_int": "0x0",
+                    "reg_width": 32,
+                    "name": "ConfigOption0",
+                    "description": "SD card Configuration Option 0",
+                    "default_value_int": "0xd0000000",
+                    "bitfields": [
+                        {
+                            "id": "field000-bits0-3",
+                            "width": 4,
+                            "name": "Instance",
+                            "access": "RW",
+                            "description": "SD peripheral instance"
+                        },
+                        {
+                            "width": 4
+                        },
+                        {
+                            "id": "field000-bit8",
+                            "width": 1,
+                            "name": "BusWidth",
+                            "access": "RW",
+                            "description": "SD interface BUS width",
+                            "values": [
+                                {
+                                    "name": "1bit",
+                                    "value": 0,
+                                    "description": "BUS width 1 bit"
+                                },
+                                {
+                                    "name": "4bit",
+                                    "value": 1,
+                                    "description": "BUS width 4 bit"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits9-11",
+                            "width": 3,
+                            "name": "TunningStart",
+                            "access": "RW",
+                            "description": "Tunning start - the final value will be multiplicated by 32"
+                        },
+                        {
+                            "id": "field000-bits12-14",
+                            "width": 3,
+                            "name": "TimingMode",
+                            "access": "RW",
+                            "description": "SD card timing mode flags",
+                            "values": [
+                                {
+                                    "name": "SDR12DefaultMode",
+                                    "value": 0,
+                                    "description": "Identification mode and SDR12"
+                                },
+                                {
+                                    "name": "SDR25HighSpeedMode",
+                                    "value": 1,
+                                    "description": "High speed mode and SDR25"
+                                },
+                                {
+                                    "name": "SDR50Mode",
+                                    "value": 2,
+                                    "description": "SDR50 mode"
+                                },
+                                {
+                                    "name": "SDR104Mode",
+                                    "value": 3,
+                                    "description": "SDR104 mode"
+                                },
+                                {
+                                    "name": "DDR50Mode",
+                                    "value": 4,
+                                    "description": "DDR50 mode"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 4
+                        },
+                        {
+                            "id": "field000-bit19",
+                            "width": 1,
+                            "name": "EnablePowerCycle",
+                            "access": "RW",
+                            "description": "Execute power cycle before initialization",
+                            "values": [
+                                {
+                                    "name": "Disabled",
+                                    "value": 0,
+                                    "description": "Power cycle disabled"
+                                },
+                                {
+                                    "name": "Enabled",
+                                    "value": 1,
+                                    "description": "Execute power cycle before initialization"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bit20",
+                            "width": 1,
+                            "name": "PowerUpDelay",
+                            "access": "RW",
+                            "description": "Set power up delay",
+                            "values": [
+                                {
+                                    "name": "5ms",
+                                    "value": 0,
+                                    "description": "Power up delay 5ms"
+                                },
+                                {
+                                    "name": "2.5ms",
+                                    "value": 1,
+                                    "description": "Power up delay 2.5ms"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits21-22",
+                            "width": 2,
+                            "name": "TunningStep",
+                            "access": "RW",
+                            "description": "Tunning step - the final value will be multiplicated by 2. In case of zero it used value 1"
+                        },
+                        {
+                            "id": "field000-bit23",
+                            "width": 1,
+                            "name": "PowerUpPolarity",
+                            "access": "RW",
+                            "description": "Power up polarity - May vary on different devices"
+                        },
+                        {
+                            "id": "field000-bits24-25",
+                            "width": 2,
+                            "name": "PowerDownTime",
+                            "access": "RW",
+                            "description": "Set power down time",
+                            "values": [
+                                {
+                                    "name": "20ms",
+                                    "value": 0,
+                                    "description": "Power up delay 20ms"
+                                },
+                                {
+                                    "name": "10ms",
+                                    "value": 1,
+                                    "description": "Power up delay 10ms"
+                                },
+                                {
+                                    "name": "5ms",
+                                    "value": 2,
+                                    "description": "Power up delay 5ms"
+                                },
+                                {
+                                    "name": "2.5ms",
+                                    "value": 3,
+                                    "description": "Power up delay 2.5ms"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 2
+                        },
+                        {
+                            "width": 4
+                        }
+                    ]
+                }
+            ]
+        }
+    ]
+}

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/memcfg/opt_word_semc_nand.json

@@ -0,0 +1,195 @@
+{
+    "cpu": "General",
+    "groups": [
+        {
+            "group": {
+                "name": "General regs",
+                "description": "General register generated by SPSDK"
+            },
+            "registers": [
+                {
+                    "id": "field000",
+                    "offset_int": "0x0",
+                    "reg_width": 32,
+                    "name": "ConfigOption0",
+                    "description": "SEMC NAND Configuration Option 0",
+                    "default_value_int": "0xd0000100",
+                    "bitfields": [
+                        {
+                            "id": "field000-bits0-2",
+                            "width": 3,
+                            "name": "OnfiVersion",
+                            "access": "RW",
+                            "description": "ONFI version"
+                        },
+                        {
+                            "id": "field000-bit3",
+                            "width": 1,
+                            "name": "EdoMode",
+                            "access": "RW",
+                            "description": "EDO mode",
+                            "values": [
+                                {
+                                    "name": "Disabled",
+                                    "value": 0,
+                                    "description": "EDO mode disabled"
+                                },
+                                {
+                                    "name": "Enabled",
+                                    "value": 1,
+                                    "description": "EDO mode enabled"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits4-6",
+                            "width": 3,
+                            "name": "OnfiTimingMode",
+                            "access": "RW",
+                            "description": "ONFI Timing mode",
+                            "values": [
+                                {
+                                    "name": "10MHz",
+                                    "value": 0,
+                                    "description": "Mode 0, 10MHz"
+                                },
+                                {
+                                    "name": "20MHz",
+                                    "value": 1,
+                                    "description": "Mode 1, 20MHz"
+                                },
+                                {
+                                    "name": "28MHz",
+                                    "value": 2,
+                                    "description": "Mode 2, 28MHz"
+                                },
+                                {
+                                    "name": "33MHz",
+                                    "value": 3,
+                                    "description": "Mode 3, 33MHz"
+                                },
+                                {
+                                    "name": "40MHz",
+                                    "value": 4,
+                                    "description": "Mode 4, 40MHz"
+                                },
+                                {
+                                    "name": "50MHz",
+                                    "value": 5,
+                                    "description": "Mode 5, 50MHz"
+                                },
+                                {
+                                    "name": "Fastest0",
+                                    "value": 6,
+                                    "description": "Mode 6, Fastest mode 0"
+                                },
+                                {
+                                    "name": "Fastest1",
+                                    "value": 7,
+                                    "description": "Mode 7, Fastest mode 1"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 1
+                        },
+                        {
+                            "id": "field000-bits8-9",
+                            "width": 2,
+                            "name": "IoPortDiv8",
+                            "access": "RW",
+                            "description": "IO port size, Minimum is 1"
+                        },
+                        {
+                            "width": 2
+                        },
+                        {
+                            "id": "field000-bits12-14",
+                            "width": 3,
+                            "name": "PcsSelection",
+                            "access": "RW",
+                            "description": "SEMC NAND PCS selection",
+                            "values": [
+                                {
+                                    "name": "CSX0",
+                                    "value": 0,
+                                    "description": "SEMC NAND CSX0"
+                                },
+                                {
+                                    "name": "CSX1",
+                                    "value": 1,
+                                    "description": "SEMC NAND CSX1"
+                                },
+                                {
+                                    "name": "CSX2",
+                                    "value": 2,
+                                    "description": "SEMC NAND CSX2"
+                                },
+                                {
+                                    "name": "CSX3",
+                                    "value": 3,
+                                    "description": "SEMC NAND CSX3"
+                                },
+                                {
+                                    "name": "A8",
+                                    "value": 4,
+                                    "description": "SEMC NAND A8"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 1
+                        },
+                        {
+                            "id": "field000-bit16",
+                            "width": 1,
+                            "name": "EccType",
+                            "access": "RW",
+                            "description": "ECC type",
+                            "values": [
+                                {
+                                    "name": "SW",
+                                    "value": 0,
+                                    "description": "Software ECC"
+                                },
+                                {
+                                    "name": "HW",
+                                    "value": 1,
+                                    "description": "Hardware ECC"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bit17",
+                            "width": 1,
+                            "name": "EccStatus",
+                            "access": "RW",
+                            "description": "ECC status",
+                            "values": [
+                                {
+                                    "name": "Enabled",
+                                    "value": 0,
+                                    "description": "ECC enabled"
+                                },
+                                {
+                                    "name": "Disabled",
+                                    "value": 1,
+                                    "description": "ECC disabled"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 6
+                        },
+                        {
+                            "width": 4
+                        },
+                        {
+                            "width": 4
+                        }
+                    ]
+                }
+            ]
+        }
+    ]
+}

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/memcfg/opt_word_semc_nor.json

@@ -0,0 +1,289 @@
+{
+    "cpu": "General",
+    "groups": [
+        {
+            "group": {
+                "name": "General regs",
+                "description": "General register generated by SPSDK"
+            },
+            "registers": [
+                {
+                    "id": "field000",
+                    "offset_int": "0x0",
+                    "reg_width": 32,
+                    "name": "ConfigOption0",
+                    "description": "SEMC NOR Configuration Option 0",
+                    "default_value_int": "0xd0000100",
+                    "bitfields": [
+                        {
+                            "id": "field000-bits0-1",
+                            "width": 2,
+                            "name": "CommandSet",
+                            "access": "RW",
+                            "description": "SEMC Parallel NOR Flash command set",
+                            "values": [
+                                {
+                                    "name": "EPSCD",
+                                    "value": 0,
+                                    "description": "As Micron MT28EW Embedded Parallel NOR Standard Command Definitions"
+                                },
+                                {
+                                    "name": "SFMCD",
+                                    "value": 1,
+                                    "description": "As Micron MT28GU StrataFlash Memory Command Definitions"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits2-3",
+                            "width": 2,
+                            "name": "AcTimingMode",
+                            "access": "RW",
+                            "description": "SEMC Parallel NOR AC timing mode (Async read mode)",
+                            "values": [
+                                {
+                                    "name": "DefaultSafe",
+                                    "value": 0,
+                                    "description": "Timing default safe"
+                                },
+                                {
+                                    "name": "DefaultSast",
+                                    "value": 1,
+                                    "description": "Timing default fast"
+                                },
+                                {
+                                    "name": "UserDefined",
+                                    "value": 2,
+                                    "description": "Timing user defined. The definition (next 6 option words) MUST follow this option word"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 4
+                        },
+                        {
+                            "id": "field000-bits8-9",
+                            "width": 2,
+                            "name": "IoPortDiv8",
+                            "access": "RW",
+                            "description": "IO port size, Minimum is 1"
+                        },
+                        {
+                            "id": "field000-bit10",
+                            "width": 1,
+                            "name": "AdvPortPolarity",
+                            "access": "RW",
+                            "description": "ADV# polarity",
+                            "values": [
+                                {
+                                    "name": "Low",
+                                    "value": 0,
+                                    "description": "ADV polarity low"
+                                },
+                                {
+                                    "name": "High",
+                                    "value": 1,
+                                    "description": "ADV polarity high"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 1
+                        },
+                        {
+                            "id": "field000-bits12-14",
+                            "width": 3,
+                            "name": "PcsSelection",
+                            "access": "RW",
+                            "description": "SEMC NOR PCS selection",
+                            "values": [
+                                {
+                                    "name": "CSX0",
+                                    "value": 0,
+                                    "description": "SEMC NOR CSX0"
+                                },
+                                {
+                                    "name": "CSX1",
+                                    "value": 1,
+                                    "description": "SEMC NOR CSX1"
+                                },
+                                {
+                                    "name": "CSX2",
+                                    "value": 2,
+                                    "description": "SEMC NOR CSX2"
+                                },
+                                {
+                                    "name": "CSX3",
+                                    "value": 3,
+                                    "description": "SEMC NOR CSX3"
+                                },
+                                {
+                                    "name": "A8",
+                                    "value": 4,
+                                    "description": "SEMC NOR A8"
+                                },
+                                {
+                                    "name": "RDY",
+                                    "value": 5,
+                                    "description": "SEMC NOR RDY"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 1
+                        },
+                        {
+                            "width": 8
+                        },
+                        {
+                            "width": 4
+                        },
+                        {
+                            "width": 4
+                        }
+                    ]
+                },
+                {
+                    "id": "field004",
+                    "offset_int": "0x4",
+                    "reg_width": 32,
+                    "name": "ConfigOption1",
+                    "description": "SEMC NOR Configuration Option 1 - User definition - Optional",
+                    "default_value_int": "0x0",
+                    "bitfields": [
+                        {
+                            "id": "field004-bits0-15",
+                            "width": 16,
+                            "name": "min_tCEH_ns",
+                            "access": "RW",
+                            "description": "User definition min_tCEH_ns"
+                        },
+                        {
+                            "id": "field004-bits16-31",
+                            "width": 16,
+                            "name": "min_tCES_ns",
+                            "access": "RW",
+                            "description": "User definition min_tCES_ns"
+                        }
+                    ]
+                },
+                {
+                    "id": "field008",
+                    "offset_int": "0x8",
+                    "reg_width": 32,
+                    "name": "ConfigOption2",
+                    "description": "SEMC NOR Configuration Option 2 - User definition - Optional",
+                    "default_value_int": "0x0",
+                    "bitfields": [
+                        {
+                            "id": "field008-bits0-15",
+                            "width": 16,
+                            "name": "min_tAS_ns",
+                            "access": "RW",
+                            "description": "User definition min_tAS_ns"
+                        },
+                        {
+                            "id": "field008-bits16-31",
+                            "width": 16,
+                            "name": "min_tCEITV_ns",
+                            "access": "RW",
+                            "description": "User definition min_tCEITV_ns"
+                        }
+                    ]
+                },
+                {
+                    "id": "field00C",
+                    "offset_int": "0xc",
+                    "reg_width": 32,
+                    "name": "ConfigOption3",
+                    "description": "SEMC NOR Configuration Option 3 - User definition - Optional",
+                    "default_value_int": "0x0",
+                    "bitfields": [
+                        {
+                            "id": "field00C-bits0-15",
+                            "width": 16,
+                            "name": "min_tTA_ns",
+                            "access": "RW",
+                            "description": "User definition min_tTA_ns"
+                        },
+                        {
+                            "id": "field00C-bits16-31",
+                            "width": 16,
+                            "name": "min_tAH_ns",
+                            "access": "RW",
+                            "description": "User definition min_tAH_ns"
+                        }
+                    ]
+                },
+                {
+                    "id": "field010",
+                    "offset_int": "0x10",
+                    "reg_width": 32,
+                    "name": "ConfigOption4",
+                    "description": "SEMC NOR Configuration Option 4 - User definition - Optional",
+                    "default_value_int": "0x0",
+                    "bitfields": [
+                        {
+                            "id": "field010-bits0-15",
+                            "width": 16,
+                            "name": "min_tWEH_ns",
+                            "access": "RW",
+                            "description": "User definition min_tWEH_ns"
+                        },
+                        {
+                            "id": "field010-bits16-31",
+                            "width": 16,
+                            "name": "min_tWEL_ns",
+                            "access": "RW",
+                            "description": "User definition min_tWEL_ns"
+                        }
+                    ]
+                },
+                {
+                    "id": "field014",
+                    "offset_int": "0x14",
+                    "reg_width": 32,
+                    "name": "ConfigOption5",
+                    "description": "SEMC NOR Configuration Option 5 - User definition - Optional",
+                    "default_value_int": "0x0",
+                    "bitfields": [
+                        {
+                            "id": "field014-bits0-15",
+                            "width": 16,
+                            "name": "min_tREL_ns",
+                            "access": "RW",
+                            "description": "User definition min_tREL_ns"
+                        },
+                        {
+                            "id": "field014-bits16-31",
+                            "width": 16,
+                            "name": "min_tAWDH_ns",
+                            "access": "RW",
+                            "description": "User definition min_tAWDH_ns"
+                        }
+                    ]
+                },
+                {
+                    "id": "field018",
+                    "offset_int": "0x18",
+                    "reg_width": 32,
+                    "name": "ConfigOption6",
+                    "description": "SEMC NOR Configuration Option 6 - User definition - Optional",
+                    "default_value_int": "0x0",
+                    "bitfields": [
+                        {
+                            "width": 16
+                        },
+                        {
+                            "id": "field018-bits16-31",
+                            "width": 16,
+                            "name": "max_tREH_ns",
+                            "access": "RW",
+                            "description": "User definition max_tREH_ns"
+                        }
+                    ]
+                }
+            ]
+        }
+    ]
+}

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/memcfg/opt_word_spi_nor.json

@@ -0,0 +1,356 @@
+{
+    "cpu": "General",
+    "groups": [
+        {
+            "group": {
+                "name": "General regs",
+                "description": "General register generated by SPSDK"
+            },
+            "registers": [
+                {
+                    "id": "field000",
+                    "offset_int": "0x0",
+                    "reg_width": 32,
+                    "name": "ConfigOption0",
+                    "description": "FlexSPI NOR Configuration Option 0",
+                    "default_value_int": "0xc0000000",
+                    "bitfields": [
+                        {
+                            "id": "field000-bits0-3",
+                            "width": 4,
+                            "name": "PageSize",
+                            "access": "RW",
+                            "description": "Page size of the NOR flash device",
+                            "values": [
+                                {
+                                    "name": "256B",
+                                    "value": 0,
+                                    "description": "Page size 256B"
+                                },
+                                {
+                                    "name": "512B",
+                                    "value": 1,
+                                    "description": "Page size 512B"
+                                },
+                                {
+                                    "name": "1MB",
+                                    "value": 2,
+                                    "description": "Page size 1MB"
+                                },
+                                {
+                                    "name": "32B",
+                                    "value": 3,
+                                    "description": "Page size 32B"
+                                },
+                                {
+                                    "name": "64B",
+                                    "value": 4,
+                                    "description": "Page size 64B"
+                                },
+                                {
+                                    "name": "128B",
+                                    "value": 5,
+                                    "description": "Page size 128B"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits4-7",
+                            "width": 4,
+                            "name": "SectorSize",
+                            "access": "RW",
+                            "description": "Sector size of the NOR flash device",
+                            "values": [
+                                {
+                                    "name": "4KB",
+                                    "value": 0,
+                                    "description": "Page size 4KB"
+                                },
+                                {
+                                    "name": "8KB",
+                                    "value": 1,
+                                    "description": "Page size 8KB"
+                                },
+                                {
+                                    "name": "32KB",
+                                    "value": 2,
+                                    "description": "Page size 32KB"
+                                },
+                                {
+                                    "name": "64KB",
+                                    "value": 3,
+                                    "description": "Page size 64KB"
+                                },
+                                {
+                                    "name": "128KB",
+                                    "value": 4,
+                                    "description": "Page size 128KB"
+                                },
+                                {
+                                    "name": "256KB",
+                                    "value": 5,
+                                    "description": "Page size 256KB"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits8-11",
+                            "width": 4,
+                            "name": "MemorySize",
+                            "access": "RW",
+                            "description": "Memory capacity of the NOR flash device",
+                            "values": [
+                                {
+                                    "name": "512KB",
+                                    "value": 0,
+                                    "description": "Page size 512KB"
+                                },
+                                {
+                                    "name": "1MB",
+                                    "value": 1,
+                                    "description": "Page size 1MB"
+                                },
+                                {
+                                    "name": "2MB",
+                                    "value": 2,
+                                    "description": "Page size 2MB"
+                                },
+                                {
+                                    "name": "4MB",
+                                    "value": 3,
+                                    "description": "Page size 4MB"
+                                },
+                                {
+                                    "name": "8MB",
+                                    "value": 4,
+                                    "description": "Page size 8MB"
+                                },
+                                {
+                                    "name": "16MB",
+                                    "value": 5,
+                                    "description": "Page size 16MB"
+                                },
+                                {
+                                    "name": "32MB",
+                                    "value": 6,
+                                    "description": "Page size 32MB"
+                                },
+                                {
+                                    "name": "64MB",
+                                    "value": 7,
+                                    "description": "Page size 64MB"
+                                },
+                                {
+                                    "name": "128MB",
+                                    "value": 8,
+                                    "description": "Page size 128MB"
+                                },
+                                {
+                                    "name": "256MB",
+                                    "value": 9,
+                                    "description": "Page size 256MB"
+                                },
+                                {
+                                    "name": "512MB",
+                                    "value": 10,
+                                    "description": "Page size 512MB"
+                                },
+                                {
+                                    "name": "1GB",
+                                    "value": 11,
+                                    "description": "Page size 1GB"
+                                },
+                                {
+                                    "name": "32KB",
+                                    "value": 12,
+                                    "description": "Page size 32KB"
+                                },
+                                {
+                                    "name": "64KB",
+                                    "value": 13,
+                                    "description": "Page size 64KB"
+                                },
+                                {
+                                    "name": "128KB",
+                                    "value": 14,
+                                    "description": "Page size 128KB"
+                                },
+                                {
+                                    "name": "256KB",
+                                    "value": 15,
+                                    "description": "Page size 256KB"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits12-15",
+                            "width": 4,
+                            "name": "MemoryType",
+                            "access": "RW",
+                            "description": "Memory type used to configure and access the NOR flash",
+                            "values": [
+                                {
+                                    "name": "NorFlash",
+                                    "value": 0,
+                                    "description": "SPI NOR FLASH"
+                                },
+                                {
+                                    "name": "EEPROM",
+                                    "value": 1,
+                                    "description": "SPI EEPROM"
+                                },
+                                {
+                                    "name": "Terminator",
+                                    "value": 2,
+                                    "description": "Terminator"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits16-19",
+                            "width": 4,
+                            "name": "PcsIndex",
+                            "access": "RW",
+                            "description": "PCS index used by SPI to access serial NOR flash",
+                            "values": [
+                                {
+                                    "name": "PCS0",
+                                    "value": 0,
+                                    "description": "Use SPIx PCS0"
+                                },
+                                {
+                                    "name": "PCS1",
+                                    "value": 1,
+                                    "description": "Use SPIx PCS1"
+                                },
+                                {
+                                    "name": "PCS2",
+                                    "value": 2,
+                                    "description": "Use SPIx PCS2"
+                                },
+                                {
+                                    "name": "PCS3",
+                                    "value": 3,
+                                    "description": "Use SPIx PCS3"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits20-23",
+                            "width": 4,
+                            "name": "SpiIndex",
+                            "access": "RW",
+                            "description": "SPI interface used to access serial NOR flash",
+                            "values": [
+                                {
+                                    "name": "SPI0",
+                                    "value": 0,
+                                    "description": "Use SPI0"
+                                },
+                                {
+                                    "name": "SPI1",
+                                    "value": 1,
+                                    "description": "Use SPI1"
+                                },
+                                {
+                                    "name": "SPI2",
+                                    "value": 2,
+                                    "description": "Use SPI2"
+                                },
+                                {
+                                    "name": "SPI3",
+                                    "value": 3,
+                                    "description": "Use SPI3"
+                                },
+                                {
+                                    "name": "SPI4",
+                                    "value": 4,
+                                    "description": "Use SPI4"
+                                },
+                                {
+                                    "name": "SPI5",
+                                    "value": 5,
+                                    "description": "Use SPI5"
+                                },
+                                {
+                                    "name": "SPI6",
+                                    "value": 6,
+                                    "description": "Use SPI6"
+                                },
+                                {
+                                    "name": "SPI7",
+                                    "value": 7,
+                                    "description": "Use SPI7"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits24-27",
+                            "width": 4,
+                            "name": "OptionSize",
+                            "access": "RW",
+                            "description": "Option Size",
+                            "values": [
+                                {
+                                    "name": "OptionSize1",
+                                    "value": 0,
+                                    "description": "Option words = 1"
+                                },
+                                {
+                                    "name": "OptionSize2",
+                                    "value": 1,
+                                    "description": "Option words = 2"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 4
+                        }
+                    ]
+                },
+                {
+                    "id": "field004",
+                    "offset_int": "0x4",
+                    "reg_width": 32,
+                    "name": "ConfigOption1",
+                    "description": "SPI NOR flash Configuration Option 1 - Optional",
+                    "default_value_int": "0x0",
+                    "bitfields": [
+                        {
+                            "id": "field004-bits0-3",
+                            "width": 4,
+                            "name": "SpiSpeed",
+                            "access": "RW",
+                            "description": "Spi NOR/EEPROM module clock freq",
+                            "values": [
+                                {
+                                    "name": "20MHz",
+                                    "value": 0,
+                                    "description": "SPI Clock set to 20MHz"
+                                },
+                                {
+                                    "name": "10MHz",
+                                    "value": 1,
+                                    "description": "SPI Clock set to 10MHz"
+                                },
+                                {
+                                    "name": "5MHz",
+                                    "value": 2,
+                                    "description": "SPI Clock set to 5MHz"
+                                },
+                                {
+                                    "name": "2MHz",
+                                    "value": 3,
+                                    "description": "SPI Clock set to 2MHz"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 28
+                        }
+                    ]
+                }
+            ]
+        }
+    ]
+}

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/memcfg/opt_word_spi_nor_legacy.json

@@ -0,0 +1,267 @@
+{
+    "cpu": "General",
+    "groups": [
+        {
+            "group": {
+                "name": "General regs",
+                "description": "General register generated by SPSDK"
+            },
+            "registers": [
+                {
+                    "id": "field000",
+                    "offset_int": "0x0",
+                    "reg_width": 32,
+                    "name": "ConfigOption0",
+                    "description": "FlexSPI NOR Configuration Option 0",
+                    "default_value_int": "0xc0000000",
+                    "bitfields": [
+                        {
+                            "id": "field000-bits0-3",
+                            "width": 4,
+                            "name": "PageSize",
+                            "access": "RW",
+                            "description": "Page size of the NOR flash device",
+                            "values": [
+                                {
+                                    "name": "256B",
+                                    "value": 0,
+                                    "description": "Page size 256B"
+                                },
+                                {
+                                    "name": "512B",
+                                    "value": 1,
+                                    "description": "Page size 512B"
+                                },
+                                {
+                                    "name": "1MB",
+                                    "value": 2,
+                                    "description": "Page size 1MB"
+                                },
+                                {
+                                    "name": "32B",
+                                    "value": 3,
+                                    "description": "Page size 32B"
+                                },
+                                {
+                                    "name": "64B",
+                                    "value": 4,
+                                    "description": "Page size 64B"
+                                },
+                                {
+                                    "name": "128B",
+                                    "value": 5,
+                                    "description": "Page size 128B"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits4-7",
+                            "width": 4,
+                            "name": "SectorSize",
+                            "access": "RW",
+                            "description": "Sector size of the NOR flash device",
+                            "values": [
+                                {
+                                    "name": "4KB",
+                                    "value": 0,
+                                    "description": "Page size 4KB"
+                                },
+                                {
+                                    "name": "8KB",
+                                    "value": 1,
+                                    "description": "Page size 8KB"
+                                },
+                                {
+                                    "name": "32KB",
+                                    "value": 2,
+                                    "description": "Page size 32KB"
+                                },
+                                {
+                                    "name": "64KB",
+                                    "value": 3,
+                                    "description": "Page size 64KB"
+                                },
+                                {
+                                    "name": "128KB",
+                                    "value": 4,
+                                    "description": "Page size 128KB"
+                                },
+                                {
+                                    "name": "256KB",
+                                    "value": 5,
+                                    "description": "Page size 256KB"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits8-11",
+                            "width": 4,
+                            "name": "MemorySize",
+                            "access": "RW",
+                            "description": "Memory capacity of the NOR flash device",
+                            "values": [
+                                {
+                                    "name": "512KB",
+                                    "value": 0,
+                                    "description": "Page size 512KB"
+                                },
+                                {
+                                    "name": "1MB",
+                                    "value": 1,
+                                    "description": "Page size 1MB"
+                                },
+                                {
+                                    "name": "2MB",
+                                    "value": 2,
+                                    "description": "Page size 2MB"
+                                },
+                                {
+                                    "name": "4MB",
+                                    "value": 3,
+                                    "description": "Page size 4MB"
+                                },
+                                {
+                                    "name": "8MB",
+                                    "value": 4,
+                                    "description": "Page size 8MB"
+                                },
+                                {
+                                    "name": "16MB",
+                                    "value": 5,
+                                    "description": "Page size 16MB"
+                                },
+                                {
+                                    "name": "32MB",
+                                    "value": 6,
+                                    "description": "Page size 32MB"
+                                },
+                                {
+                                    "name": "64MB",
+                                    "value": 7,
+                                    "description": "Page size 64MB"
+                                },
+                                {
+                                    "name": "128MB",
+                                    "value": 8,
+                                    "description": "Page size 128MB"
+                                },
+                                {
+                                    "name": "256MB",
+                                    "value": 9,
+                                    "description": "Page size 256MB"
+                                },
+                                {
+                                    "name": "512MB",
+                                    "value": 10,
+                                    "description": "Page size 512MB"
+                                },
+                                {
+                                    "name": "1GB",
+                                    "value": 11,
+                                    "description": "Page size 1GB"
+                                },
+                                {
+                                    "name": "32KB",
+                                    "value": 12,
+                                    "description": "Page size 32KB"
+                                },
+                                {
+                                    "name": "64KB",
+                                    "value": 13,
+                                    "description": "Page size 64KB"
+                                },
+                                {
+                                    "name": "128KB",
+                                    "value": 14,
+                                    "description": "Page size 128KB"
+                                },
+                                {
+                                    "name": "256KB",
+                                    "value": 15,
+                                    "description": "Page size 256KB"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits12-15",
+                            "width": 4,
+                            "name": "MemoryType",
+                            "access": "RW",
+                            "description": "Memory type used to configure and access the NOR flash",
+                            "values": [
+                                {
+                                    "name": "Manual",
+                                    "value": 0,
+                                    "description": "Configure manually based on configure option block"
+                                },
+                                {
+                                    "name": "Auto",
+                                    "value": 2,
+                                    "description": "AutoConfigure the Nor flash via SFDP info"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 4
+                        },
+                        {
+                            "id": "field000-bits20-23",
+                            "width": 4,
+                            "name": "SpiIndex",
+                            "access": "RW",
+                            "description": "SPI interface used to access serial NOR flash",
+                            "values": [
+                                {
+                                    "name": "SPI0",
+                                    "value": 0,
+                                    "description": "Use SPI0"
+                                },
+                                {
+                                    "name": "SPI1",
+                                    "value": 1,
+                                    "description": "Use SPI1"
+                                },
+                                {
+                                    "name": "SPI2",
+                                    "value": 2,
+                                    "description": "Use SPI2"
+                                },
+                                {
+                                    "name": "SPI3",
+                                    "value": 3,
+                                    "description": "Use SPI3"
+                                },
+                                {
+                                    "name": "SPI4",
+                                    "value": 4,
+                                    "description": "Use SPI4"
+                                },
+                                {
+                                    "name": "SPI5",
+                                    "value": 5,
+                                    "description": "Use SPI5"
+                                },
+                                {
+                                    "name": "SPI6",
+                                    "value": 6,
+                                    "description": "Use SPI6"
+                                },
+                                {
+                                    "name": "SPI7",
+                                    "value": 7,
+                                    "description": "Use SPI7"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 4
+                        },
+                        {
+                            "width": 4
+                        }
+                    ]
+                }
+            ]
+        }
+    ]
+}

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/memcfg/opt_word_xspi_nor.json

@@ -0,0 +1,318 @@
+{
+    "cpu": "General",
+    "groups": [
+        {
+            "group": {
+                "name": "General regs",
+                "description": "General register generated by SPSDK"
+            },
+            "registers": [
+                {
+                    "id": "field000",
+                    "offset_int": "0x0",
+                    "reg_width": 32,
+                    "name": "ConfigOption0",
+                    "description": "FlexSPI NOR Configuration Option 0",
+                    "default_value_int": "0xc0000000",
+                    "bitfields": [
+                        {
+                            "id": "field000-bits0-3",
+                            "width": 4,
+                            "name": "MaxFreq",
+                            "access": "RW",
+                            "description": "The maximum work frequency for specified Flash device",
+                            "values": [
+                                {
+                                    "name": "NoChange",
+                                    "value": 0,
+                                    "description": "Don't change FlexSPI clock setting"
+                                },
+                                {
+                                    "name": "30Mhz",
+                                    "value": 1,
+                                    "description": "30MHz"
+                                },
+                                {
+                                    "name": "50Mhz",
+                                    "value": 2,
+                                    "description": "50MHz"
+                                },
+                                {
+                                    "name": "60Mhz",
+                                    "value": 3,
+                                    "description": "60MHz"
+                                },
+                                {
+                                    "name": "80Mhz",
+                                    "value": 4,
+                                    "description": "80MHz"
+                                },
+                                {
+                                    "name": "100Mhz",
+                                    "value": 5,
+                                    "description": "100MHz"
+                                },
+                                {
+                                    "name": "120Mhz",
+                                    "value": 6,
+                                    "description": "120MHz"
+                                },
+                                {
+                                    "name": "133Mhz",
+                                    "value": 7,
+                                    "description": "133MHz"
+                                },
+                                {
+                                    "name": "166Mhz",
+                                    "value": 8,
+                                    "description": "166MHz"
+                                },
+                                {
+                                    "name": "200Mhz",
+                                    "value": 8,
+                                    "description": "200MHz"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits4-7",
+                            "width": 4,
+                            "name": "Misc",
+                            "access": "RW",
+                            "description": "Specify miscellaneous mode for selected flash type; Experimental feature, do not use in products, keep it as 0.",
+                            "values": [
+                                {
+                                    "name": "NotEnabled",
+                                    "value": 0,
+                                    "description": "Miscellaneous mode is not enabled"
+                                },
+                                {
+                                    "name": "Mode0-4-4",
+                                    "value": 1,
+                                    "description": "Enable 0-4-4 mode for High Random Read performance"
+                                },
+                                {
+                                    "name": "SwappedMode",
+                                    "value": 3,
+                                    "description": " Data Order Swapped mode (for MXIC OctaFlash only)"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits8-11",
+                            "width": 4,
+                            "name": "QuadEnableType",
+                            "access": "RW",
+                            "description": "Specify the Quad Enable sequence, only applicable for device that only JESD216 compliant, this field is ignored if device support JESD216A or later version. This field will be effective only if device is compliant with JESD216 only (9 longword SDFP table)",
+                            "values": [
+                                {
+                                    "name": "NotConfigure",
+                                    "value": 0,
+                                    "description": "Not Configured"
+                                },
+                                {
+                                    "name": "Bit6InSR1",
+                                    "value": 1,
+                                    "description": "QE bit is bit6 in StatusReg1"
+                                },
+                                {
+                                    "name": "Bit1InSR2",
+                                    "value": 2,
+                                    "description": "QE bit is bit1 in StatusReg2"
+                                },
+                                {
+                                    "name": "Bit7InSR2",
+                                    "value": 3,
+                                    "description": "QE bit is bit7 in StatusReg2"
+                                },
+                                {
+                                    "name": "Bit1InSR2EnableCmdIs0x31",
+                                    "value": 4,
+                                    "description": "QE bit is bit1 in StatusReg2, enable command is 0x31"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits12-15",
+                            "width": 4,
+                            "name": "CMDPad(s)",
+                            "access": "RW",
+                            "description": "Commands pads for the Flash device (1/4/8), for device that works under 1-1-4,1-4-4,1-1-8 or 1-8-8 mode, CMD pad(s) value is always 0x0, for devices that only support 4-4-4 mode for high performance, CMD pads value is 2, for devices that only support 8-8-8 mode for high performance, CMD pads value is 3",
+                            "values": [
+                                {
+                                    "name": "1",
+                                    "value": 0,
+                                    "description": "1 bit"
+                                },
+                                {
+                                    "name": "4",
+                                    "value": 2,
+                                    "description": "4 bits"
+                                },
+                                {
+                                    "name": "8",
+                                    "value": 3,
+                                    "description": "8 bits"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits16-19",
+                            "width": 4,
+                            "name": "Query CMDPad(s)",
+                            "access": "RW",
+                            "description": "Command pads (1/4/8) for the SFDP command",
+                            "values": [
+                                {
+                                    "name": "1",
+                                    "value": 0,
+                                    "description": "1 bit"
+                                },
+                                {
+                                    "name": "4",
+                                    "value": 2,
+                                    "description": "4 bits"
+                                },
+                                {
+                                    "name": "8",
+                                    "value": 3,
+                                    "description": "8 bits"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits20-23",
+                            "width": 4,
+                            "name": "Device Detection Type",
+                            "access": "RW",
+                            "description": "SW defined device types used for config block autodetection",
+                            "values": [
+                                {
+                                    "name": "QuadSPI_SDR",
+                                    "value": 0,
+                                    "description": "QuadSPI SDR"
+                                },
+                                {
+                                    "name": "QuadSPI_DDR",
+                                    "value": 1,
+                                    "description": "QuadSPI DDR"
+                                },
+                                {
+                                    "name": "HyperFLASH_3V",
+                                    "value": 3,
+                                    "description": "HyperFLASH 3V"
+                                },
+                                {
+                                    "name": "MXICOPI_DDR",
+                                    "value": 4,
+                                    "description": "MXICOPI DDR"
+                                },
+                                {
+                                    "name": "MicronOPI_DDR",
+                                    "value": 6,
+                                    "description": "MicronOPI DDR"
+                                },
+                                {
+                                    "name": "AdestoOPI_DDR",
+                                    "value": 8,
+                                    "description": "AdestoOPI DDR"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits24-27",
+                            "width": 4,
+                            "name": "OptionSize",
+                            "access": "RW",
+                            "description": "Option Size",
+                            "values": [
+                                {
+                                    "name": "OptionSize1",
+                                    "value": 0,
+                                    "description": "Option words = 1"
+                                },
+                                {
+                                    "name": "OptionSize2",
+                                    "value": 1,
+                                    "description": "Option words = 2"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 4
+                        }
+                    ]
+                },
+                {
+                    "id": "field004",
+                    "offset_int": "0x4",
+                    "reg_width": 32,
+                    "name": "ConfigOption1",
+                    "description": "FlexSPI NOR Flash Configuration Option 1 - Optional",
+                    "default_value_int": "0x0",
+                    "bitfields": [
+                        {
+                            "id": "field004-bits0-7",
+                            "width": 8,
+                            "name": "DummyCycles",
+                            "access": "RW",
+                            "description": "User provided dummy cycles for SDR/DDR read command: 0 - Auto detection, Others - Specified dummy cycles"
+                        },
+                        {
+                            "id": "field004-bits8-15",
+                            "width": 8,
+                            "name": "StatusOverride",
+                            "access": "RW",
+                            "description": "Override status register value during device mode configuration"
+                        },
+                        {
+                            "id": "field004-bits16-19",
+                            "width": 4,
+                            "name": "PinMuxGroup",
+                            "access": "RW",
+                            "description": "Pin multiplexer group selection"
+                        },
+                        {
+                            "id": "field004-bits20-23",
+                            "width": 4,
+                            "name": "DqsPinMuxGroup",
+                            "access": "RW",
+                            "description": "DQS Pin multiplexer group selection"
+                        },
+                        {
+                            "id": "field004-bits24-27",
+                            "width": 4,
+                            "name": "PinDriveStrength",
+                            "access": "RW",
+                            "description": "The Drive Strength of FlexSPI Pads"
+                        },
+                        {
+                            "id": "field004-bits28-31",
+                            "width": 4,
+                            "name": "FlashConnection",
+                            "access": "RW",
+                            "description": "Select the FlexSPI Port A/B",
+                            "values": [
+                                {
+                                    "name": "SingleFlashPort_A",
+                                    "value": 0,
+                                    "description": "Single Flash connected to port A"
+                                },
+                                {
+                                    "name": "ParallelMode",
+                                    "value": 1,
+                                    "description": "Parallel mode"
+                                },
+                                {
+                                    "name": "SingleFlashPort_B",
+                                    "value": 2,
+                                    "description": "Single Flash connected to port B"
+                                }
+                            ]
+                        }
+                    ]
+                }
+            ]
+        }
+    ]
+}

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/pfrc_rules.yaml

@@ -0,0 +1,77 @@
+# Copyright 2020-2024 NXP
+#
+# SPDX-License-Identifier: BSD-3-Clause
+
+rules:
+  - req_id: "1.1"
+    desc:
+      Never write any non-zero configuration into DCFG_CC_SOCU_NS_PIN before DCFG_CC_SOCU_PIN
+      contains any valid (non-zero) configuration.
+    msg: The CMPA.DCFG_CC_SOCU_PIN[0:9] must be set in case the CFPA.DCFG_CC_SOCU_NS_PIN[0:9] is set.
+    cond: any(True if (((CFPA.DCFG_CC_SOCU_NS_PIN >> index) & 1) and not ((CMPA.DCFG_CC_SOCU_PIN >> index) & 1)) else False for index in range(0, int(10)))
+
+  - req_id: "1.2"
+    desc:
+      Never write any non-zero configuration into DCFG_CC_SOCU_NS_DFLT before DCFG_CC_SOCU_DFLT
+      contains any valid (non-zero) configuration.
+    msg: The CMPA.DCFG_CC_SOCU_DFLT[0:9] must be set in case the CFPA.DCFG_CC_SOCU_NS_DFLT[0:9] is set.
+    cond: any(True if (((CFPA.DCFG_CC_SOCU_NS_DFLT >> index) & 1) and not ((CMPA.DCFG_CC_SOCU_DFLT >> index) & 1)) else False for index in range(0, int(10)))
+
+  - req_id: "1.3"
+    desc: Inverse value (upper 16 bits) of DCFG_CC_SOCU_PIN must be always
+      valid. Only exception are blank devices where CC_SOCU_PIN contains all
+      zeros.
+    msg: Inverse values are generated automatically based on configuration.
+    cond: CMPA.DCFG_CC_SOCU_PIN != 0 and (~(CMPA.DCFG_CC_SOCU_PIN>>int(16)) & 0xFFFF) != (CMPA.DCFG_CC_SOCU_PIN & 0xFFFF)
+
+  - req_id: "1.4"
+    desc: Inverse value (upper 16 bits) of DCFG_CC_SOCU_DFLT must be always
+      valid. Only exception are blank devices where CC_SOCU_DFLT contains all
+      zeros.
+    msg: Inverse values are generated automatically based on configuration.
+    cond: CMPA.DCFG_CC_SOCU_DFLT != 0 and (~(CMPA.DCFG_CC_SOCU_DFLT>>int(16)) & 0xFFFF) != (CMPA.DCFG_CC_SOCU_DFLT & 0xFFFF)
+
+  - req_id: "1.5"
+    desc: Inverse value (upper 16 bits) of DCFG_CC_SOCU_NS_PIN must be always
+      valid. Only exception are blank devices where CC_SOCU_xxx contains all
+      zeros.
+    msg: Inverse values are generated automatically based on configuration.
+    cond: CFPA.DCFG_CC_SOCU_NS_PIN != 0 and (~(CFPA.DCFG_CC_SOCU_NS_PIN>>int(16)) & 0xFFFF) != (CFPA.DCFG_CC_SOCU_NS_PIN & 0xFFFF)
+
+  - req_id: "1.6"
+    desc: Inverse value (upper 16 bits) of DCFG_CC_SOCU_NS_DFLT must be always
+      valid. Only exception are blank devices where CC_SOCU_DFLT contains all
+      zeros.
+    msg: Inverse values are generated automatically based on configuration.
+    cond: CFPA.DCFG_CC_SOCU_NS_DFLT != 0 and (~(CFPA.DCFG_CC_SOCU_NS_DFLT>>int(16)) & 0xFFFF) != (CFPA.DCFG_CC_SOCU_NS_DFLT & 0xFFFF)
+
+  - req_id: "1.7"
+    desc:
+      Do not write invalid PIN/DFLT configuration in CMPA area. Setting PIN bit
+      to 0 and DFLT bit to 1 for given feature is not allowed
+    msg: Invalid bit combination. If CMPA.DCFG_CC_SOCU_PIN[0:9] is 0, CMPA.DCFG_CC_SOCU_DFLT[0:9] can't be set to 1!
+    cond: any(True if (not ((CMPA.DCFG_CC_SOCU_PIN >> index) & 1) and ((CMPA.DCFG_CC_SOCU_DFLT >> index) & 1)) else False for index in range(0, int(10)))
+
+  - req_id: "1.8"
+    desc:
+      Do not write invalid PIN/DFLT configuration in CFPA area. Setting PIN bit
+      to 0 and DFLT bit to 1 for given feature is not allowed
+    msg: Invalid bit combination. If CFPA.DCFG_CC_SOCU_NS_PIN[0:9] is 0, CFPA.DCFG_CC_SOCU_NS_DFLT[0:9] can't be set to 1!
+    cond: any(True if (not ((CFPA.DCFG_CC_SOCU_NS_PIN >> index) & 1) and ((CFPA.DCFG_CC_SOCU_NS_DFLT >> index) & 1)) else False for index in range(0, int(10)))
+
+  - req_id: "1.9"
+    desc: If CMPA DCFG_CC_SOCU_DFLT is used the DCFG_CC_SOCU_PIN must be used also.
+    msg: The CMPA DCFG_CC_SOCU_PIN is not set, but the DCFG_CC_SOCU_DFLT is defined.
+    cond: CMPA.DCFG_CC_SOCU_DFLT != 0 and CMPA.DCFG_CC_SOCU_PIN==0
+
+  - req_id: "1.10"
+    desc: If CMPA DCFG_CC_SOCU_PIN is used the DCFG_CC_SOCU_DFLT must be used also.
+    msg: The CMPA DCFG_CC_SOCU_DFLT is not set, but the DCFG_CC_SOCU_PIN is defined.
+    cond: CMPA.DCFG_CC_SOCU_PIN != 0 and CMPA.DCFG_CC_SOCU_DFLT==0
+
+  - req_id: "2.1"
+    desc:
+      This CMPA_PROG_IN_PROGRESS must be always 0x00000000. Only ROM bootloader
+      is allowed to write anything to this field.
+    msg: The CMPA_PROG_IN_PROGRESS must be set to 0!
+    cond: CFPA.CMPA_PROG_IN_PROGRESS != 0

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/uuu/emmc_burn_all.lst

@@ -0,0 +1,38 @@
+uuu_version 1.4.149
+
+# @_flash.bin            | bootloader, which can extract from wic image
+# @_image   [_flash.bin] | wic image burn to emmc.
+
+
+# This command will be run when i.MX6/7 i.MX8MM, i.MX8MQ
+SDP: boot -f _flash.bin -scanlimited 0x800000
+
+# This command will be run when ROM support stream mode
+# i.MX8QXP, i.MX8QM
+SDPS: boot -scanterm -f _flash.bin -scanlimited 0x800000
+
+# These commands will be run when use SPL and will be skipped if no spl
+# SDPU will be deprecated. please use SDPV instead of SDPU
+# {
+SDPU: delay 1000
+SDPU: write -f _flash.bin -offset 0x57c00
+SDPU: jump -scanlimited 0x800000
+# }
+
+# These commands will be run when use SPL and will be skipped if no spl
+# if (SPL support SDPV)
+# {
+SDPV: delay 1000
+SDPV: write -f _flash.bin -skipspl -scanterm -scanlimited 0x800000
+SDPV: jump -scanlimited 0x800000
+# }
+
+
+FB: ucmd setenv fastboot_dev mmc
+FB: ucmd setenv mmcdev ${emmc_dev}
+FB: ucmd mmc dev ${emmc_dev}
+FB: flash -raw2sparse all _image
+FB: flash -scanterm -scanlimited 0x800000 bootloader _flash.bin
+FB: ucmd if env exists emmc_ack; then ; else setenv emmc_ack 0; fi;
+FB: ucmd mmc partconf ${emmc_dev} ${emmc_ack} 1 0
+FB: done

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/uuu/emmc_burn_loader.lst

@@ -0,0 +1,35 @@
+uuu_version 1.2.39
+
+# @_flash.bin            | bootloader
+# @_image   [_flash.bin] | image burn to emmc, default is the same as bootloader
+
+# This command will be run when i.MX6/7 i.MX8MM, i.MX8MQ
+SDP: boot -f _flash.bin
+
+# This command will be run when ROM support stream mode
+# i.MX8QXP, i.MX8QM
+SDPS: boot -f _flash.bin
+
+# These commands will be run when use SPL and will be skipped if no spl
+# SDPU will be deprecated. please use SDPV instead of SDPU
+# {
+SDPU: delay 1000
+SDPU: write -f _flash.bin -offset 0x57c00
+SDPU: jump
+# }
+
+# These commands will be run when use SPL and will be skipped if no spl
+# if (SPL support SDPV)
+# {
+SDPV: delay 1000
+SDPV: write -f _flash.bin -skipspl
+SDPV: jump
+# }
+
+FB: ucmd setenv fastboot_dev mmc
+FB: ucmd setenv mmcdev ${emmc_dev}
+FB: ucmd mmc dev ${emmc_dev}
+FB: flash bootloader _image
+FB: ucmd if env exists emmc_ack; then ; else setenv emmc_ack 0; fi;
+FB: ucmd mmc partconf ${emmc_dev} ${emmc_ack} 1 0
+FB: Done

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/uuu/fat_write.lst

@@ -0,0 +1,12 @@
+uuu_version 1.1.4
+
+# @_image                | image, which cp to fat partition
+# @_device		 | storage device, mmc\sata
+# @_partition		 | fat partition number, like 1:1
+# @_filename [_image]	 | file name in target fat partition, only support rootdir now
+
+FB: ucmd setenv fastboot_buffer ${loadaddr}
+FB: download -f _image
+FB: ucmd if test ! -n "$fastboot_bytes"; then setenv fastboot_bytes $filesize; else true; fi
+FB[-t 20000]: ucmd fatwrite _device _partition ${fastboot_buffer} _filename  ${fastboot_bytes}
+FB: done

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/uuu/fspinand_burn_loader.lst

@@ -0,0 +1,36 @@
+uuu_version 1.2.39
+
+# @_flexspi.bin            | bootloader
+# @_image   [_flexspi.bin] | image burn to fspinand, default is the same as bootloader
+
+# This command will be run when i.MX6/7 i.MX8MM, i.MX8MQ
+SDP: boot -f _flexspi.bin
+
+# This command will be run when ROM support stream mode
+# i.MX8QXP, i.MX8QM, skip QSPI header
+SDPS: boot -f _flexspi.bin -skipfhdr
+
+# These commands will be run when use SPL and will be skipped if no spl
+# SDPU will be deprecated. please use SDPV instead of SDPU
+# {
+SDPU: delay 1000
+SDPU: write -f _flexspi.bin -offset 0x10000 -skipfhdr
+SDPU: jump
+# }
+
+# These commands will be run when use SPL and will be skipped if no spl
+# if (SPL support SDPV)
+# {
+SDPV: delay 1000
+SDPV: write -f _flexspi.bin -skipspl -skipfhdr
+SDPV: jump
+# }
+
+FB: ucmd setenv fastboot_buffer ${loadaddr}
+FB: download -f _image
+
+FB: ucmd if test ! -n "$fastboot_bytes"; then setenv fastboot_bytes $filesize; else true; fi
+
+FB[-t 60000]: ucmd fspinand init spi-nand0 ${fastboot_buffer} ${fastboot_bytes}
+
+FB: done

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/uuu/nand_burn_loader.lst

@@ -0,0 +1,35 @@
+uuu_version 1.2.39
+
+# @_flash.bin            | bootloader
+# @_image   [_flash.bin] | image burn to nand, default is the same as bootloader
+
+# This command will be run when i.MX6/7 i.MX8MM, i.MX8MQ
+SDP: boot -f _flash.bin
+
+# This command will be run when ROM support stream mode
+# i.MX8QXP, i.MX8QM
+SDPS: boot -f _flash.bin
+
+# These commands will be run when use SPL and will be skipped if no spl
+# SDPU will be deprecated. please use SDPV instead of SDPU
+# {
+SDPU: delay 1000
+SDPU: write -f _flash.bin -offset 0x57c00
+SDPU: jump
+# }
+
+# These commands will be run when use SPL and will be skipped if no spl
+# if (SPL support SDPV)
+# {
+SDPV: delay 1000
+SDPV: write -f _flash.bin -skipspl
+SDPV: jump
+# }
+
+FB: ucmd setenv fastboot_buffer ${loadaddr}
+FB: download -f _image
+FB: ucmd if test ! -n "$fastboot_bytes"; then setenv fastboot_bytes $filesize; else true; fi
+# Burn image to nandfit partition if needed
+FB: ucmd if env exists nandfit_part; then nand erase.part nandfit; nand write ${fastboot_buffer} nandfit ${fastboot_bytes}; else true; fi;
+FB: ucmd nandbcb init ${fastboot_buffer} nandboot ${fastboot_bytes}
+FB: Done

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/uuu/nvme_burn_all.lst

@@ -0,0 +1,34 @@
+uuu_version 1.4.149
+
+# @_flash.bin            | bootloader, which can extract from wic image
+# @_image   [_flash.bin] | wic image burn to emmc.
+
+
+# This command will be run when i.MX6/7 i.MX8MM, i.MX8MQ
+SDP: boot -f _flash.bin -scanlimited 0x800000
+
+# This command will be run when ROM support stream mode
+# i.MX8QXP, i.MX8QM
+SDPS: boot -scanterm -f _flash.bin -scanlimited 0x800000
+
+# These commands will be run when use SPL and will be skipped if no spl
+# SDPU will be deprecated. please use SDPV instead of SDPU
+# {
+SDPU: delay 1000
+SDPU: write -f _flash.bin -offset 0x57c00
+SDPU: jump -scanlimited 0x800000
+# }
+
+# These commands will be run when use SPL and will be skipped if no spl
+# if (SPL support SDPV)
+# {
+SDPV: delay 1000
+SDPV: write -f _flash.bin -skipspl -scanterm -scanlimited 0x800000
+SDPV: jump -scanlimited 0x800000
+# }
+
+FB: ucmd pci
+FB: ucmd nvme scan
+FB: ucmd setenv fastboot_buffer ${loadaddr}
+FB: write -format "nvme write ${fastboot_buffer} @off @size"  -blksz 512 -f _image
+FB: done

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/uuu/qspi_burn_loader.lst

@@ -0,0 +1,43 @@
+uuu_version 1.2.39
+
+# @_flexspi.bin            | bootloader
+# @_image   [_flexspi.bin] | image burn to flexspi, default is the same as bootloader
+
+# This command will be run when i.MX6/7 i.MX8MM, i.MX8MQ
+SDP: boot -f _flexspi.bin
+
+# This command will be run when ROM support stream mode
+# i.MX8QXP, i.MX8QM, skip QSPI header
+SDPS: boot -f _flexspi.bin -skipfhdr
+
+# These commands will be run when use SPL and will be skipped if no spl
+# SDPU will be deprecated. please use SDPV instead of SDPU
+# {
+SDPU: delay 1000
+SDPU: write -f _flexspi.bin -offset 0x10000 -skipfhdr
+SDPU: jump
+# }
+
+# These commands will be run when use SPL and will be skipped if no spl
+# if (SPL support SDPV)
+# {
+SDPV: delay 1000
+SDPV: write -f _flexspi.bin -skipspl -skipfhdr
+SDPV: jump
+# }
+
+FB: ucmd setenv fastboot_buffer ${loadaddr}
+FB: download -f _image
+
+FB: ucmd if test ! -n "$fastboot_bytes"; then setenv fastboot_bytes $filesize; else true; fi
+
+# Check Image if include flexspi header
+FB: ucmd if qspihdr dump ${fastboot_buffer}; then setenv qspihdr_exist yes; else setenv qspihdr_exist no; fi;
+
+FB[-t 60000]: ucmd if test ${qspihdr_exist} = yes; then qspihdr init ${fastboot_buffer} ${fastboot_bytes} safe; else true; fi;
+
+#if uboot can't support qspihdr command, use uboot image to write qspi image, which require image include qspi flash header
+FB: ucmd if test ${qspihdr_exist} = no; then sf probe; else true; fi;
+FB[-t 40000]: ucmd if test ${qspihdr_exist} = no; then sf erase 0 +${fastboot_bytes}; else true; fi;
+FB[-t 20000]: ucmd if test ${qspihdr_exist} = no; then sf write ${fastboot_buffer} 0 ${fastboot_bytes}; else true; fi;
+FB: done

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/uuu/sd_burn_all.lst

@@ -0,0 +1,35 @@
+uuu_version 1.4.149
+
+# @_flash.bin            | bootloader, which can extract from wic image
+# @_image   [_flash.bin] | wic image burn to emmc.
+
+
+# This command will be run when i.MX6/7 i.MX8MM, i.MX8MQ
+SDP: boot -f _flash.bin -scanlimited 0x800000
+
+# This command will be run when ROM support stream mode
+# i.MX8QXP, i.MX8QM
+SDPS: boot -scanterm -f _flash.bin -scanlimited 0x800000
+
+# These commands will be run when use SPL and will be skipped if no spl
+# SDPU will be deprecated. please use SDPV instead of SDPU
+# {
+SDPU: delay 1000
+SDPU: write -f _flash.bin -offset 0x57c00 -scanlimited 0x800000
+SDPU: jump -scanlimited 0x800000
+# }
+
+# These commands will be run when use SPL and will be skipped if no spl
+# if (SPL support SDPV)
+# {
+SDPV: delay 1000
+SDPV: write -f _flash.bin -skipspl -scanterm -scanlimited 0x800000
+SDPV: jump -scanlimited 0x800000
+# }
+
+FB: ucmd setenv fastboot_dev mmc
+FB: ucmd setenv mmcdev ${sd_dev}
+FB: ucmd mmc dev ${sd_dev}
+FB: flash -raw2sparse all _image
+FB: flash -scanterm -scanlimited 0x800000 bootloader _flash.bin
+FB: done

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/uuu/sd_burn_loader.lst

@@ -0,0 +1,33 @@
+uuu_version 1.2.39
+
+# @_flash.bin            | bootloader
+# @_image   [_flash.bin] | image burn to emmc, default is the same as bootloader
+
+# This command will be run when i.MX6/7 i.MX8MM, i.MX8MQ
+SDP: boot -f _flash.bin
+
+# This command will be run when ROM support stream mode
+# i.MX8QXP, i.MX8QM
+SDPS: boot -f _flash.bin
+
+# These commands will be run when use SPL and will be skipped if no spl
+# SDPU will be deprecated. please use SDPV instead of SDPU
+# {
+SDPU: delay 1000
+SDPU: write -f _flash.bin -offset 0x57c00
+SDPU: jump
+# }
+
+# These commands will be run when use SPL and will be skipped if no spl
+# if (SPL support SDPV)
+# {
+SDPV: delay 1000
+SDPV: write -f _flash.bin -skipspl
+SDPV: jump
+# }
+
+FB: ucmd setenv fastboot_dev mmc
+FB: ucmd setenv mmcdev ${sd_dev}
+FB: ucmd mmc dev ${sd_dev}
+FB: flash bootloader _image
+FB: Done

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/uuu/spl_boot.lst

@@ -0,0 +1,26 @@
+uuu_version 1.2.39
+
+# This command will be run when i.MX6/7 i.MX8MM, i.MX8MQ
+SDP: boot -f _flash.bin
+
+# This command will be run when ROM support stream mode
+# i.MX8QXP, i.MX8QM
+SDPS[-t 10000]: boot -f _flash.bin
+
+# These commands will be run when use SPL and will be skipped if no spl
+# SDPU will be deprecated. please use SDPV instead of SDPU
+# {
+SDPU: delay 1000
+SDPU: write -f _flash.bin -offset 0x57c00
+SDPU: jump
+SDPU: done
+# }
+
+# These commands will be run when use SPL and will be skipped if no spl
+# if (SPL support SDPV)
+# {
+SDPV: delay 1000
+SDPV: write -f _flash.bin -skipspl
+SDPV: jump
+SDPV: done
+# }

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/xmcd/flexspi_ram_header.json

@@ -0,0 +1,89 @@
+{
+    "cpu": "General",
+    "groups": [
+        {
+            "group": {
+                "name": "General regs",
+                "description": "General register generated by SPSDK"
+            },
+            "registers": [
+                {
+                    "id": "field000",
+                    "offset_int": "0x0",
+                    "reg_width": 32,
+                    "name": "header",
+                    "description": "XMCD Header",
+                    "default_value_int": "0xc0000000",
+                    "bitfields": [
+                        {
+                            "id": "field000-bits0-11",
+                            "width": 12,
+                            "name": "configurationBlockSize",
+                            "access": "RW",
+                            "description": "Configuration block size including XMCD header itself"
+                        },
+                        {
+                            "id": "field000-bits12-15",
+                            "width": 4,
+                            "name": "configurationBlockType",
+                            "access": "RW",
+                            "description": "Configuration block type: 0 - Simplified, 1 - Full",
+                            "values": [
+                                {
+                                    "name": "Simplified",
+                                    "value": 0,
+                                    "description": "Simplified configuration block type"
+                                },
+                                {
+                                    "name": "Full",
+                                    "value": 1,
+                                    "description": "Full configuration block type"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits16-19",
+                            "width": 4,
+                            "name": "instance",
+                            "access": "RW",
+                            "description": "SoC defined instances"
+                        },
+                        {
+                            "id": "field000-bits20-23",
+                            "width": 4,
+                            "name": "memoryInterface",
+                            "access": "RW",
+                            "description": "Memory interface: 0 - FlexSPI, 1 - SEMC",
+                            "values": [
+                                {
+                                    "name": "FlexSPI",
+                                    "value": 0,
+                                    "description": "FlexSPI memory interface"
+                                },
+                                {
+                                    "name": "SEMC",
+                                    "value": 1,
+                                    "description": "SEMC memory interface"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits24-27",
+                            "width": 4,
+                            "name": "version",
+                            "access": "RO",
+                            "description": "Version, fixed value 0x0"
+                        },
+                        {
+                            "id": "field000-bits28-31",
+                            "width": 4,
+                            "name": "tag",
+                            "access": "RO",
+                            "description": "Tag, fixed value 0xC"
+                        }
+                    ]
+                }
+            ]
+        }
+    ]
+}

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/xmcd/flexspi_ram_simplified.json

@@ -0,0 +1,312 @@
+{
+    "cpu": "General",
+    "groups": [
+        {
+            "group": {
+                "name": "General regs",
+                "description": "General register generated by SPSDK"
+            },
+            "registers": [
+                {
+                    "id": "field000",
+                    "offset_int": "0x0",
+                    "reg_width": 32,
+                    "name": "header",
+                    "description": "XMCD Header",
+                    "default_value_int": "0xc001000c",
+                    "bitfields": [
+                        {
+                            "id": "field000-bits0-11",
+                            "width": 12,
+                            "name": "configurationBlockSize",
+                            "access": "RW",
+                            "description": "Configuration block size including XMCD header itself"
+                        },
+                        {
+                            "id": "field000-bits12-15",
+                            "width": 4,
+                            "name": "configurationBlockType",
+                            "access": "RW",
+                            "description": "Configuration block type: 0 - Simplified, 1 - Full",
+                            "values": [
+                                {
+                                    "name": "Simplified",
+                                    "value": 0,
+                                    "description": "Simplified configuration block type"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits16-19",
+                            "width": 4,
+                            "name": "instance",
+                            "access": "RW",
+                            "description": "SoC defined instances"
+                        },
+                        {
+                            "id": "field000-bits20-23",
+                            "width": 4,
+                            "name": "memoryInterface",
+                            "access": "RW",
+                            "description": "Memory interface: 0 - FlexSPI, 1 - SEMC",
+                            "values": [
+                                {
+                                    "name": "FlexSPI",
+                                    "value": 0,
+                                    "description": "FlexSPI memory interface"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits24-27",
+                            "width": 4,
+                            "name": "version",
+                            "access": "RO",
+                            "description": "Version, fixed value 0x0"
+                        },
+                        {
+                            "id": "field000-bits28-31",
+                            "width": 4,
+                            "name": "tag",
+                            "access": "RO",
+                            "description": "Tag, fixed value 0xC"
+                        }
+                    ]
+                }
+            ]
+        },
+        {
+            "group": {
+                "name": "General regs",
+                "description": "General register generated by SPSDK"
+            },
+            "registers": [
+                {
+                    "id": "field004",
+                    "offset_int": "0x4",
+                    "reg_width": 32,
+                    "name": "configOption0",
+                    "description": "XMCD Configuration Option 0",
+                    "default_value_int": "0xc1000700",
+                    "bitfields": [
+                        {
+                            "id": "field004-bits0-7",
+                            "width": 8,
+                            "name": "sizeInMB",
+                            "access": "RW",
+                            "description": "Size in MB: 0 - Auto detection, Others - Size in MB"
+                        },
+                        {
+                            "id": "field004-bits8-11",
+                            "width": 4,
+                            "name": "maximumFrequency",
+                            "access": "RW",
+                            "description": "Maximum frequency (SoC specific definitions)",
+                            "values": [
+                                {
+                                    "name": "30MHz",
+                                    "value": 1,
+                                    "description": "Maximum 30MHz"
+                                },
+                                {
+                                    "name": "50MHz",
+                                    "value": 2,
+                                    "description": "Maximum 50MHz"
+                                },
+                                {
+                                    "name": "60MHz",
+                                    "value": 3,
+                                    "description": "Maximum 60MHz"
+                                },
+                                {
+                                    "name": "80MHz",
+                                    "value": 4,
+                                    "description": "Maximum 80MHz"
+                                },
+                                {
+                                    "name": "100MHz",
+                                    "value": 5,
+                                    "description": "Maximum 100MHz"
+                                },
+                                {
+                                    "name": "120MHz",
+                                    "value": 6,
+                                    "description": "Maximum 120MHz"
+                                },
+                                {
+                                    "name": "133MHz",
+                                    "value": 7,
+                                    "description": "Maximum 133MHz"
+                                },
+                                {
+                                    "name": "166MHz",
+                                    "value": 8,
+                                    "description": "Maximum 166MHz"
+                                },
+                                {
+                                    "name": "200MHz",
+                                    "value": 9,
+                                    "description": "Maximum 200MHz"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field004-bits12-15",
+                            "width": 4,
+                            "name": "misc",
+                            "access": "RW",
+                            "description": "Misc. For HyperRAM: 0 - 1.8V, 1 - 3V",
+                            "values": [
+                                {
+                                    "name": "1.8V",
+                                    "value": 0,
+                                    "description": "1.8V"
+                                },
+                                {
+                                    "name": "3V",
+                                    "value": 1,
+                                    "description": "3V"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 4
+                        },
+                        {
+                            "id": "field004-bits20-23",
+                            "width": 4,
+                            "name": "deviceType",
+                            "access": "RW",
+                            "description": "Device type: 0 - HyperRAM, 1 - APMemory",
+                            "values": [
+                                {
+                                    "name": "HYPER_RAM",
+                                    "value": 0,
+                                    "description": "HyperRAM"
+                                },
+                                {
+                                    "name": "AP_MEMORY",
+                                    "value": 1,
+                                    "description": "APMemory"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field004-bits24-27",
+                            "width": 4,
+                            "name": "optionSize",
+                            "access": "RW",
+                            "description": "Option Size",
+                            "values": [
+                                {
+                                    "name": "1",
+                                    "value": 0,
+                                    "description": "Option words = 1"
+                                },
+                                {
+                                    "name": "2",
+                                    "value": 1,
+                                    "description": "Option words = 2"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field004-bits28-31",
+                            "width": 4,
+                            "name": "tag",
+                            "access": "RO",
+                            "description": "Tag, fixed value 0xC"
+                        }
+                    ]
+                },
+                {
+                    "id": "field008",
+                    "offset_int": "0x8",
+                    "reg_width": 32,
+                    "name": "configOption1",
+                    "description": "XMCD Configuration Option 1",
+                    "default_value_int": "0x0",
+                    "bitfields": [
+                        {
+                            "id": "field008-bits0-3",
+                            "width": 4,
+                            "name": "readDummyCycles",
+                            "access": "RW",
+                            "description": "Read dummy cycles: 0 - Auto detection, Others - Specified dummy cycles"
+                        },
+                        {
+                            "id": "field008-bits4-7",
+                            "width": 4,
+                            "name": "writeDummyCycles",
+                            "access": "RW",
+                            "description": "Write dummy cycles: 0 - Auto detection, Others - Specified dummy cycles"
+                        },
+                        {
+                            "width": 8
+                        },
+                        {
+                            "id": "field008-bits16-19",
+                            "width": 4,
+                            "name": "pinMuxGroup",
+                            "access": "RW",
+                            "description": "Pin mux group: 0 - Primary Group, 1 - Secondary group",
+                            "values": [
+                                {
+                                    "name": "Primary group",
+                                    "value": 0,
+                                    "description": "Primary group"
+                                },
+                                {
+                                    "name": "Secondary group",
+                                    "value": 1,
+                                    "description": "Secondary group"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field008-bits20-23",
+                            "width": 4,
+                            "name": "dqsPinmuxGroup",
+                            "access": "RW",
+                            "description": "DQS pin mux group: 0 - Default Group, 1 - Secondary group",
+                            "values": [
+                                {
+                                    "name": "Default group",
+                                    "value": 0,
+                                    "description": "Default group"
+                                },
+                                {
+                                    "name": "Secondary group",
+                                    "value": 1,
+                                    "description": "Secondary group"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 4
+                        },
+                        {
+                            "id": "field008-bits28-31",
+                            "width": 4,
+                            "name": "ramConnection",
+                            "access": "RW",
+                            "description": "RAM connection",
+                            "values": [
+                                {
+                                    "name": "PORTA",
+                                    "value": 0,
+                                    "description": "PORTA"
+                                },
+                                {
+                                    "name": "PORTB",
+                                    "value": 1,
+                                    "description": "PORTB"
+                                }
+                            ]
+                        }
+                    ]
+                }
+            ]
+        }
+    ]
+}

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/xmcd/semc_sdram_full.json

@@ -0,0 +1,715 @@
+{
+    "cpu": "General",
+    "groups": [
+        {
+            "group": {
+                "name": "General regs",
+                "description": "General register generated by SPSDK"
+            },
+            "registers": [
+                {
+                    "id": "field000",
+                    "offset_int": "0x0",
+                    "reg_width": 32,
+                    "name": "header",
+                    "description": "XMCD Header",
+                    "default_value_int": "0xc0101048",
+                    "bitfields": [
+                        {
+                            "id": "field000-bits0-11",
+                            "width": 12,
+                            "name": "configurationBlockSize",
+                            "access": "RW",
+                            "description": "Configuration block size including XMCD header itself"
+                        },
+                        {
+                            "id": "field000-bits12-15",
+                            "width": 4,
+                            "name": "configurationBlockType",
+                            "access": "RW",
+                            "description": "Configuration block type: 0 - Simplified, 1 - Full",
+                            "values": [
+                                {
+                                    "name": "SIMPLIFIED",
+                                    "value": 0,
+                                    "description": "Simplified configuration block type"
+                                },
+                                {
+                                    "name": "FULL",
+                                    "value": 1,
+                                    "description": "Full configuration block type"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits16-19",
+                            "width": 4,
+                            "name": "instance",
+                            "access": "RW",
+                            "description": "SoC defined instances"
+                        },
+                        {
+                            "id": "field000-bits20-23",
+                            "width": 4,
+                            "name": "memoryInterface",
+                            "access": "RW",
+                            "description": "Memory interface: 0 - FlexSPI, 1 - SEMC",
+                            "values": [
+                                {
+                                    "name": "FLEXSPI",
+                                    "value": 0,
+                                    "description": "FlexSPI memory interface"
+                                },
+                                {
+                                    "name": "SEMC",
+                                    "value": 1,
+                                    "description": "SEMC memory interface"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits24-27",
+                            "width": 4,
+                            "name": "version",
+                            "access": "RW",
+                            "description": "Version, fixed value 0x0"
+                        },
+                        {
+                            "id": "field000-bits28-31",
+                            "width": 4,
+                            "name": "tag",
+                            "access": "RW",
+                            "description": "Tag, fixed value 0xC"
+                        }
+                    ]
+                }
+            ]
+        },
+        {
+            "group": {
+                "name": "General regs",
+                "description": "General register generated by SPSDK"
+            },
+            "registers": [
+                {
+                    "id": "field004",
+                    "offset_int": "0x4",
+                    "reg_width": 8,
+                    "name": "magicNumber",
+                    "description": "Fixed to 0xA1",
+                    "default_value_int": "0xa1"
+                },
+                {
+                    "id": "field005",
+                    "offset_int": "0x5",
+                    "reg_width": 8,
+                    "name": "version",
+                    "description": "Set to 1 for this implementation",
+                    "default_value_int": "0x1"
+                },
+                {
+                    "id": "field006",
+                    "offset_int": "0x6",
+                    "reg_width": 8,
+                    "name": "configOption",
+                    "description": "Simplified - 0x00, Full - 0xFF - Must be 0xFF in this case",
+                    "default_value_int": "0xff",
+                    "bitfields": [
+                        {
+                            "id": "field006-bits0-7",
+                            "width": 8,
+                            "name": "configOption",
+                            "access": "RW",
+                            "description": "Config option",
+                            "values": [
+                                {
+                                    "name": "FULL",
+                                    "value": 0,
+                                    "description": "Full configuration. Must configure all fields."
+                                }
+                            ]
+                        }
+                    ]
+                },
+                {
+                    "id": "field007",
+                    "offset_int": "0x7",
+                    "reg_width": 8,
+                    "name": "clkMhz",
+                    "description": "Set the working frequency in the unit of MHz",
+                    "default_value_int": "0xA6"
+                },
+                {
+                    "id": "field008",
+                    "offset_int": "0x8",
+                    "reg_width": 32,
+                    "name": "sdramSizeKb",
+                    "description": "Set the memory size of SDRAM CS0 in the unit of kilobytes. Range: 0x0000_0004~0x0040_0000, i.e. 4~4*1024*1024 kilobytes.",
+                    "default_value_int": "0x10000"
+                },
+                {
+                    "id": "field00C",
+                    "offset_int": "0xc",
+                    "reg_width": 8,
+                    "name": "portSize",
+                    "description": "Port size of SDRAM: 0 - 8-bit, 1 - 16-bit, 2 - 32-bit",
+                    "default_value_int": "0x2",
+                    "bitfields": [
+                        {
+                            "id": "field00C-bits0-7",
+                            "width": 8,
+                            "name": "portSize",
+                            "access": "RW",
+                            "description": "Port size of SDRAM",
+                            "values": [
+                                {
+                                    "name": "8_BIT",
+                                    "value": 0,
+                                    "description": "8-bit"
+                                },
+                                {
+                                    "name": "16_BIT",
+                                    "value": 1,
+                                    "description": "16-bit"
+                                },
+                                {
+                                    "name": "32_BIT",
+                                    "value": 2,
+                                    "description": "32-bit"
+                                }
+                            ]
+                        }
+                    ]
+                },
+                {
+                    "id": "field00D",
+                    "offset_int": "0xd",
+                    "reg_width": 8,
+                    "name": "pinConfigPull",
+                    "description": "Pull config of the SDRAM GPIO pin: 0 - Forbidden, 1 - Pull up, 2 - Pull down, 3 - No pull, Others - Invalid value",
+                    "default_value_int": "0x3",
+                    "bitfields": [
+                        {
+                            "id": "field00D-bits0-7",
+                            "width": 8,
+                            "name": "pinConfigPull",
+                            "access": "RW",
+                            "description": "Pull config of the SDRAM GPIO pin",
+                            "values": [
+                                {
+                                    "name": "FORBIDDEN",
+                                    "value": 0,
+                                    "description": "Forbidden"
+                                },
+                                {
+                                    "name": "PULL_UP",
+                                    "value": 1,
+                                    "description": "Pull up"
+                                },
+                                {
+                                    "name": "PULL_DOWN",
+                                    "value": 2,
+                                    "description": "Pull down"
+                                },
+                                {
+                                    "name": "NO_PULL",
+                                    "value": 3,
+                                    "description": "No pull"
+                                }
+                            ]
+                        }
+                    ]
+                },
+                {
+                    "id": "field00E",
+                    "offset_int": "0xe",
+                    "reg_width": 8,
+                    "name": "pinConfigDriveStrength",
+                    "description": "Driver config of SDRAM GPIO pin: 0 - High driver, 1 - Normal driver, Others - Invalid value",
+                    "default_value_int": "0x0",
+                    "bitfields": [
+                        {
+                            "id": "field00E-bits0-7",
+                            "width": 8,
+                            "name": "pinConfigDriveStrength",
+                            "access": "RW",
+                            "description": "Driver config of SDRAM GPIO pin",
+                            "values": [
+                                {
+                                    "name": "DRIVE_STRENGTH_HIGH",
+                                    "value": 0,
+                                    "description": "High driver"
+                                },
+                                {
+                                    "name": "DRIVE_STRENGTH_NORM",
+                                    "value": 1,
+                                    "description": "Normal driver"
+                                }
+                            ]
+                        }
+                    ]
+                },
+                {
+                    "id": "field00F",
+                    "offset_int": "0xf",
+                    "reg_width": 8,
+                    "name": "muxRdy",
+                    "description": "SDRAM CSn device selection: 1 - SDRAM CS1, 2 - SDRAM CS2, 3 - SDRAM CS3, Others - Invalid for SDRAM, select other external devices",
+                    "default_value_int": "0x1",
+                    "bitfields": [
+                        {
+                            "id": "field00F-bits0-7",
+                            "width": 8,
+                            "name": "muxRdy",
+                            "access": "RW",
+                            "description": "SDRAM CSn device selection",
+                            "values": [
+                                {
+                                    "name": "CS1",
+                                    "value": 1,
+                                    "description": "SDRAM CS1"
+                                },
+                                {
+                                    "name": "CS2",
+                                    "value": 2,
+                                    "description": "SDRAM CS2"
+                                },
+                                {
+                                    "name": "CS3",
+                                    "value": 3,
+                                    "description": "SDRAM CS3"
+                                }
+                            ]
+                        }
+                    ]
+                },
+                {
+                    "id": "field010",
+                    "offset_int": "0x10",
+                    "reg_width": 8,
+                    "name": "muxCsx0",
+                    "description": "SDRAM CSn device selection: 1 - SDRAM CS1, 2 - SDRAM CS2, 3 - SDRAM CS3, Others - Invalid for SDRAM, select other external devices",
+                    "default_value_int": "0x1",
+                    "bitfields": [
+                        {
+                            "id": "field010-bits0-7",
+                            "width": 8,
+                            "name": "muxCsx0",
+                            "access": "RW",
+                            "description": "SDRAM CSn device selection",
+                            "values": [
+                                {
+                                    "name": "CSX0_CS1",
+                                    "value": 1,
+                                    "description": "SDRAM CS1"
+                                },
+                                {
+                                    "name": "CSX0_CS2",
+                                    "value": 2,
+                                    "description": "SDRAM CS2"
+                                },
+                                {
+                                    "name": "CSX0_CS3",
+                                    "value": 3,
+                                    "description": "SDRAM CS3"
+                                }
+                            ]
+                        }
+                    ]
+                },
+                {
+                    "id": "field011",
+                    "offset_int": "0x11",
+                    "reg_width": 8,
+                    "name": "muxCsx1",
+                    "description": "SDRAM CSn device selection: 1 - SDRAM CS1, 2 - SDRAM CS2, 3 - SDRAM CS3, Others - Invalid for SDRAM, select other external devices",
+                    "default_value_int": "0x1",
+                    "bitfields": [
+                        {
+                            "id": "field011-bits0-7",
+                            "width": 8,
+                            "name": "muxCsx1",
+                            "access": "RW",
+                            "description": "SDRAM CSn device selection",
+                            "values": [
+                                {
+                                    "name": "CSX1_CS1",
+                                    "value": 1,
+                                    "description": "SDRAM CS1"
+                                },
+                                {
+                                    "name": "CSX1_CS2",
+                                    "value": 2,
+                                    "description": "SDRAM CS2"
+                                },
+                                {
+                                    "name": "CSX1_CS3",
+                                    "value": 3,
+                                    "description": "SDRAM CS3"
+                                }
+                            ]
+                        }
+                    ]
+                },
+                {
+                    "id": "field012",
+                    "offset_int": "0x12",
+                    "reg_width": 8,
+                    "name": "muxCsx2",
+                    "description": "SDRAM CSn device selection: 1 - SDRAM CS1, 2 - SDRAM CS2, 3 - SDRAM CS3, Others - Invalid for SDRAM, select other external devices",
+                    "default_value_int": "0x1",
+                    "bitfields": [
+                        {
+                            "id": "field012-bits0-7",
+                            "width": 8,
+                            "name": "muxCsx2",
+                            "access": "RW",
+                            "description": "SDRAM CSn device selection",
+                            "values": [
+                                {
+                                    "name": "CSX2_CS1",
+                                    "value": 1,
+                                    "description": "SDRAM CS1"
+                                },
+                                {
+                                    "name": "CSX2_CS2",
+                                    "value": 2,
+                                    "description": "SDRAM CS2"
+                                },
+                                {
+                                    "name": "CSX2_CS3",
+                                    "value": 3,
+                                    "description": "SDRAM CS3"
+                                }
+                            ]
+                        }
+                    ]
+                },
+                {
+                    "id": "field013",
+                    "offset_int": "0x13",
+                    "reg_width": 8,
+                    "name": "muxCsx3",
+                    "description": "SDRAM CSn device selection: 1 - SDRAM CS1, 2 - SDRAM CS2, 3 - SDRAM CS3, Others - Invalid for SDRAM, select other external devices",
+                    "default_value_int": "0x1",
+                    "bitfields": [
+                        {
+                            "id": "field013-bits0-7",
+                            "width": 8,
+                            "name": "muxCsx3",
+                            "access": "RW",
+                            "description": "SDRAM CSn device selection",
+                            "values": [
+                                {
+                                    "name": "CSX3_CS1",
+                                    "value": 1,
+                                    "description": "SDRAM CS1"
+                                },
+                                {
+                                    "name": "CSX3_CS2",
+                                    "value": 2,
+                                    "description": "SDRAM CS2"
+                                },
+                                {
+                                    "name": "CSX3_CS3",
+                                    "value": 3,
+                                    "description": "SDRAM CS3"
+                                }
+                            ]
+                        }
+                    ]
+                },
+                {
+                    "id": "field014",
+                    "offset_int": "0x14",
+                    "reg_width": 8,
+                    "name": "bank",
+                    "description": "Bank numbers of SDRAM device: 0 - 4 banks, 1 - 2 banks, Others - Invalid value",
+                    "default_value_int": "0x0",
+                    "bitfields": [
+                        {
+                            "id": "field014-bits0-7",
+                            "width": 8,
+                            "name": "bank",
+                            "access": "RW",
+                            "description": "Bank numbers of SDRAM device",
+                            "values": [
+                                {
+                                    "name": "BANK_4",
+                                    "value": 0,
+                                    "description": "4 banks"
+                                },
+                                {
+                                    "name": "BANK_2",
+                                    "value": 1,
+                                    "description": "2 banks"
+                                }
+                            ]
+                        }
+                    ]
+                },
+                {
+                    "id": "field015",
+                    "offset_int": "0x15",
+                    "reg_width": 8,
+                    "name": "burstLen",
+                    "description": "Burst length: 0 - 1, 1 - 2, 2 - 4, 3 - 8, Others - Invalid value",
+                    "default_value_int": "0x0",
+                    "bitfields": [
+                        {
+                            "id": "field015-bits0-7",
+                            "width": 8,
+                            "name": "burstLen",
+                            "access": "RW",
+                            "description": "Burst length",
+                            "values": [
+                                {
+                                    "name": "BURST_LEN_1",
+                                    "value": 0,
+                                    "description": "1"
+                                },
+                                {
+                                    "name": "BURST_LEN_2",
+                                    "value": 1,
+                                    "description": "2"
+                                },
+                                {
+                                    "name": "BURST_LEN_4",
+                                    "value": 2,
+                                    "description": "4"
+                                },
+                                {
+                                    "name": "BURST_LEN_8",
+                                    "value": 3,
+                                    "description": "8"
+                                }
+                            ]
+                        }
+                    ]
+                },
+                {
+                    "id": "field016",
+                    "offset_int": "0x16",
+                    "reg_width": 8,
+                    "name": "columnAddrBitNum",
+                    "description": "Column address bit number: 0 - 12 bit, 1 - 11 bit, 2 - 10 bit, 3 - 9 bit, 4 - 8 bit, Others - Invalid value",
+                    "default_value_int": "0x0",
+                    "bitfields": [
+                        {
+                            "id": "field016-bits0-7",
+                            "width": 8,
+                            "name": "columnAddrBitNum",
+                            "access": "RW",
+                            "description": "Column address bit number",
+                            "values": [
+                                {
+                                    "name": "COL_ADDR_BIT_NUM_12",
+                                    "value": 0,
+                                    "description": "12 bit"
+                                },
+                                {
+                                    "name": "COL_ADDR_BIT_NUM_11",
+                                    "value": 1,
+                                    "description": "11 bit"
+                                },
+                                {
+                                    "name": "COL_ADDR_BIT_NUM_10",
+                                    "value": 2,
+                                    "description": "10 bit"
+                                },
+                                {
+                                    "name": "COL_ADDR_BIT_NUM_9",
+                                    "value": 3,
+                                    "description": "9 bit"
+                                },
+                                {
+                                    "name": "COL_ADDR_BIT_NUM_8",
+                                    "value": 4,
+                                    "description": "8 bit"
+                                }
+                            ]
+                        }
+                    ]
+                },
+                {
+                    "id": "field017",
+                    "offset_int": "0x17",
+                    "reg_width": 8,
+                    "name": "casLatency",
+                    "description": "CAS Latency: 1 - 1, 2 - 2, 3 - 3, Others - Invalid value",
+                    "default_value_int": "0x1",
+                    "bitfields": [
+                        {
+                            "id": "field017-bits0-7",
+                            "width": 8,
+                            "name": "casLatency",
+                            "access": "RW",
+                            "description": "CAS Latency",
+                            "values": [
+                                {
+                                    "name": "CAS_LATENCY_1",
+                                    "value": 1,
+                                    "description": "1"
+                                },
+                                {
+                                    "name": "CAS_LATENCY_2",
+                                    "value": 2,
+                                    "description": "2"
+                                },
+                                {
+                                    "name": "CAS_LATENCY_3",
+                                    "value": 3,
+                                    "description": "3"
+                                }
+                            ]
+                        }
+                    ]
+                },
+                {
+                    "id": "field018",
+                    "offset_int": "0x18",
+                    "reg_width": 8,
+                    "name": "writeRecoveryNs",
+                    "description": "Write recovery time in unit of nanosecond. This could help to meet tWR timing requirement by the SDRAM device.",
+                    "default_value_int": "0x0"
+                },
+                {
+                    "id": "field019",
+                    "offset_int": "0x19",
+                    "reg_width": 8,
+                    "name": "refreshRecoveryNs",
+                    "description": "Refresh recovery time in unit of nanosecond. This could help to meet tRFC timing requirement by the SDRAM device.",
+                    "default_value_int": "0x0"
+                },
+                {
+                    "id": "field01A",
+                    "offset_int": "0x1a",
+                    "reg_width": 8,
+                    "name": "act2readwriteNs",
+                    "description": "Act to read/write wait time in unit of nanosecond. This could help to meet tRCD timing requirement by the SDRAM device.",
+                    "default_value_int": "0x0"
+                },
+                {
+                    "id": "field01B",
+                    "offset_int": "0x1b",
+                    "reg_width": 8,
+                    "name": "precharge2actNs",
+                    "description": "Precharge to active wait time in unit of nanosecond. This could help to meet tRP timing requirement by SDRAM device.",
+                    "default_value_int": "0x0"
+                },
+                {
+                    "id": "field01C",
+                    "offset_int": "0x1c",
+                    "reg_width": 8,
+                    "name": "act2actBanksNs",
+                    "description": "Active to active wait time between two different banks in unit of nanosecond. This could help to meet tRRD timing requirement by the SDRAM device.",
+                    "default_value_int": "0x0"
+                },
+                {
+                    "id": "field01D",
+                    "offset_int": "0x1d",
+                    "reg_width": 8,
+                    "name": "refresh2refreshNs",
+                    "description": "Auto refresh to auto refresh wait time in unit of nanosecond. This could help to meet tRFC timing requirement by the SDRAM device.",
+                    "default_value_int": "0x0"
+                },
+                {
+                    "id": "field01E",
+                    "offset_int": "0x1e",
+                    "reg_width": 8,
+                    "name": "selfrefRecoveryNs",
+                    "description": "Self refresh recovery time in unit of nanosecond. This could help to meet tXSR timing requirement by the SDRAM device.",
+                    "default_value_int": "0x0"
+                },
+                {
+                    "id": "field01F",
+                    "offset_int": "0x1f",
+                    "reg_width": 8,
+                    "name": "act2prechargeMinNs",
+                    "description": "ACT to Precharge minimum time in unit of nanosecond. This could help to meet tRAS(max) timing requirement by the SDRAM device.",
+                    "default_value_int": "0x0"
+                },
+                {
+                    "id": "field020",
+                    "offset_int": "0x20",
+                    "reg_width": 32,
+                    "name": "act2prechargeMaxNs",
+                    "description": "ACT to Precharge maximum time in unit of nanosecond. This could help to meet tRAS(max) timing requirement by the SDRAM device.",
+                    "default_value_int": "0x0"
+                },
+                {
+                    "id": "field024",
+                    "offset_int": "0x24",
+                    "reg_width": 32,
+                    "name": "refreshperiodPerrowNs",
+                    "description": "Refresh timer period in unit of nanosecond. Set to (tREF(ms) * 1000000/rows) value.",
+                    "default_value_int": "0x0"
+                },
+                {
+                    "id": "field028",
+                    "offset_int": "0x28",
+                    "reg_width": 32,
+                    "name": "modeRegister",
+                    "description": "Define the specific mode of operation of SDRAM. Set to the value required by SDRAM device.",
+                    "default_value_int": "0x0"
+                },
+                {
+                    "id": "field02C",
+                    "offset_int": "0x2c",
+                    "reg_width": 32,
+                    "name": "sdram0Base",
+                    "description": "Base address of SDRAM CS0. Range: 0x8000_0000~0xDFFF_FFFF.",
+                    "default_value_int": "0x0"
+                },
+                {
+                    "id": "field030",
+                    "offset_int": "0x30",
+                    "reg_width": 32,
+                    "name": "sdram1Base",
+                    "description": "Base address of SDRAM CS1. Range: 0x8000_0000~0xDFFF_FFFF. If CS1 is not being used, set the address to 0.",
+                    "default_value_int": "0x0"
+                },
+                {
+                    "id": "field034",
+                    "offset_int": "0x34",
+                    "reg_width": 32,
+                    "name": "sdram2Base",
+                    "description": "Base address of SDRAM CS2. Range: 0x8000_0000~0xDFFF_FFFF. If CS2 is not being used, set the address to 0.",
+                    "default_value_int": "0x0"
+                },
+                {
+                    "id": "field038",
+                    "offset_int": "0x38",
+                    "reg_width": 32,
+                    "name": "sdram3Base",
+                    "description": "Base address of SDRAM CS3. Range: 0x8000_0000~0xDFFF_FFFF. If CS3 is not being used, set the address to 0.",
+                    "default_value_int": "0x0"
+                },
+                {
+                    "id": "field03C",
+                    "offset_int": "0x3c",
+                    "reg_width": 32,
+                    "name": "sdram1SizeKb",
+                    "description": "Set the memory size of SDRAM CS1 in unit of kbytes. Range: 0x0000_0004~0x0040_0000, i.e. 4~4*1024*1024 kilobytes.",
+                    "default_value_int": "0x0"
+                },
+                {
+                    "id": "field040",
+                    "offset_int": "0x40",
+                    "reg_width": 32,
+                    "name": "sdram2SizeKb",
+                    "description": "Set the memory size of SDRAM CS2 in unit of kbytes. Range: 0x0000_0004~0x0040_0000, i.e. 4~4*1024*1024 kilobytes.",
+                    "default_value_int": "0x0"
+                },
+                {
+                    "id": "field044",
+                    "offset_int": "0x44",
+                    "reg_width": 32,
+                    "name": "sdram3SizeKb",
+                    "description": "Set the memory size of SDRAM CS3 in unit of kbytes. Range: 0x0000_0004~0x0040_0000, i.e. 4~4*1024*1024 kilobytes.",
+                    "default_value_int": "0x0"
+                }
+            ]
+        }
+    ]
+}

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/xmcd/semc_sdram_header.json

@@ -0,0 +1,89 @@
+{
+    "cpu": "General",
+    "groups": [
+        {
+            "group": {
+                "name": "General regs",
+                "description": "General register generated by SPSDK"
+            },
+            "registers": [
+                {
+                    "id": "field000",
+                    "offset_int": "0x0",
+                    "reg_width": 32,
+                    "name": "header",
+                    "description": "XMCD Header",
+                    "default_value_int": "0xc0000000",
+                    "bitfields": [
+                        {
+                            "id": "field000-bits0-11",
+                            "width": 12,
+                            "name": "configurationBlockSize",
+                            "access": "RW",
+                            "description": "Configuration block size including XMCD header itself"
+                        },
+                        {
+                            "id": "field000-bits12-15",
+                            "width": 4,
+                            "name": "configurationBlockType",
+                            "access": "RW",
+                            "description": "Configuration block type: 0 - Simplified, 1 - Full",
+                            "values": [
+                                {
+                                    "name": "SIMPLIFIED",
+                                    "value": 0,
+                                    "description": "Simplified configuration block type"
+                                },
+                                {
+                                    "name": "FULL",
+                                    "value": 1,
+                                    "description": "Full configuration block type"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits16-19",
+                            "width": 4,
+                            "name": "instance",
+                            "access": "RW",
+                            "description": "SoC defined instances"
+                        },
+                        {
+                            "id": "field000-bits20-23",
+                            "width": 4,
+                            "name": "memoryInterface",
+                            "access": "RW",
+                            "description": "Memory interface: 0 - FlexSPI, 1 - SEMC",
+                            "values": [
+                                {
+                                    "name": "FLEXSPI",
+                                    "value": 0,
+                                    "description": "FlexSPI memory interface"
+                                },
+                                {
+                                    "name": "SEMC",
+                                    "value": 1,
+                                    "description": "SEMC memory interface"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits24-27",
+                            "width": 4,
+                            "name": "version",
+                            "access": "RO",
+                            "description": "Version, fixed value 0x0"
+                        },
+                        {
+                            "id": "field000-bits28-31",
+                            "width": 4,
+                            "name": "tag",
+                            "access": "RO",
+                            "description": "Tag, fixed value 0xC"
+                        }
+                    ]
+                }
+            ]
+        }
+    ]
+}

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/xmcd/semc_sdram_simplified.json

@@ -0,0 +1,178 @@
+{
+    "cpu": "General",
+    "groups": [
+        {
+            "group": {
+                "name": "General regs",
+                "description": "General register generated by SPSDK"
+            },
+            "registers": [
+                {
+                    "id": "field000",
+                    "offset_int": "0x0",
+                    "reg_width": 32,
+                    "name": "header",
+                    "description": "XMCD Header",
+                    "default_value_int": "0xc010000d",
+                    "bitfields": [
+                        {
+                            "id": "field000-bits0-11",
+                            "width": 12,
+                            "name": "configurationBlockSize",
+                            "access": "RW",
+                            "description": "Configuration block size including XMCD header itself"
+                        },
+                        {
+                            "id": "field000-bits12-15",
+                            "width": 4,
+                            "name": "configurationBlockType",
+                            "access": "RW",
+                            "description": "Configuration block type: 0 - Simplified, 1 - Full",
+                            "values": [
+                                {
+                                    "name": "Simplified",
+                                    "value": 0,
+                                    "description": "Simplified configuration block type"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits16-19",
+                            "width": 4,
+                            "name": "instance",
+                            "access": "RW",
+                            "description": "SoC defined instances"
+                        },
+                        {
+                            "id": "field000-bits20-23",
+                            "width": 4,
+                            "name": "memoryInterface",
+                            "access": "RW",
+                            "description": "Memory interface: 0 - FlexSPI, 1 - SEMC",
+                            "values": [
+                                {
+                                    "name": "SEMC",
+                                    "value": 1,
+                                    "description": "SEMC memory interface"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits24-27",
+                            "width": 4,
+                            "name": "version",
+                            "access": "RO",
+                            "description": "Version, fixed value 0x0"
+                        },
+                        {
+                            "id": "field000-bits28-31",
+                            "width": 4,
+                            "name": "tag",
+                            "access": "RO",
+                            "description": "Tag, fixed value 0xC"
+                        }
+                    ]
+                }
+            ]
+        },
+        {
+            "group": {
+                "name": "General regs",
+                "description": "General register generated by SPSDK"
+            },
+            "registers": [
+                {
+                    "id": "field004",
+                    "offset_int": "0x4",
+                    "reg_width": 8,
+                    "access": "RO",
+                    "name": "magicNumber",
+                    "description": "Magic number: Fixed to 0xA1",
+                    "default_value_int": "0xA1"
+                },
+                {
+                    "id": "field005",
+                    "offset_int": "0x5",
+                    "reg_width": 8,
+                    "name": "version",
+                    "description": "Version: Set to 1 for this implementation",
+                    "default_value_int": "0x1"
+                },
+                {
+                    "id": "field006",
+                    "offset_int": "0x6",
+                    "reg_width": 8,
+                    "name": "configOption",
+                    "description": "Config option: Simplified - 0x00, Full - 0xFF; Must be 0x00 in this case",
+                    "default_value_int": "0x0",
+                    "bitfields": [
+                        {
+                            "id": "field006-bits0-7",
+                            "width": 8,
+                            "name": "configOption",
+                            "access": "RW",
+                            "description": "Config option",
+                            "values": [
+                                {
+                                    "name": "Simplified",
+                                    "value": 0,
+                                    "description": "Simplified configuration"
+                                }
+                            ]
+                        }
+                    ]
+                },
+                {
+                    "id": "field007",
+                    "offset_int": "0x7",
+                    "reg_width": 8,
+                    "name": "clkMhz",
+                    "description": "Set the working frequency in the unit of MHz",
+                    "default_value_int": "0xA6"
+                },
+                {
+                    "id": "field008",
+                    "offset_int": "0x8",
+                    "reg_width": 32,
+                    "name": "sdramSizeKb",
+                    "description": "Set the memory size of SDRAM CS0 in the unit of kilobytes. Range: 0x0000_0004~0x0040_0000, i.e. 4~4*1024*1024 kilobytes.",
+                    "default_value_int": "0x10000"
+                },
+                {
+                    "id": "field00C",
+                    "offset_int": "0xc",
+                    "reg_width": 8,
+                    "name": "portSize",
+                    "description": "Port size of SDRAM",
+                    "default_value_int": "0x2",
+                    "bitfields": [
+                        {
+                            "id": "field00C-bits0-7",
+                            "width": 8,
+                            "name": "portSize",
+                            "access": "RW",
+                            "description": "Port size of SDRAM",
+                            "values": [
+                                {
+                                    "name": "8bit",
+                                    "value": 0,
+                                    "description": "8-bit"
+                                },
+                                {
+                                    "name": "16bit",
+                                    "value": 1,
+                                    "description": "16-bit"
+                                },
+                                {
+                                    "name": "32bit",
+                                    "value": 2,
+                                    "description": "32-bit"
+                                }
+                            ]
+                        }
+                    ]
+                }
+            ]
+        }
+    ]
+}

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/xmcd/xspi_ram_header.json

@@ -0,0 +1,96 @@
+{
+    "cpu": "General",
+    "groups": [
+        {
+            "group": {
+                "name": "General regs",
+                "description": "General register generated by SPSDK"
+            },
+            "registers": [
+                {
+                    "id": "field000",
+                    "offset_int": "0x0",
+                    "reg_width": 32,
+                    "name": "header",
+                    "description": "XMCD Header",
+                    "default_value_int": "0xc0000000",
+                    "bitfields": [
+                        {
+                            "id": "field000-bits0-11",
+                            "width": 12,
+                            "name": "configurationBlockSize",
+                            "access": "RW",
+                            "description": "Configuration block size including XMCD header itself"
+                        },
+                        {
+                            "id": "field000-bits12-15",
+                            "width": 4,
+                            "name": "configurationBlockType",
+                            "access": "RW",
+                            "description": "Configuration block type: 0 - Simplified, 1 - Full",
+                            "values": [
+                                {
+                                    "name": "SIMPLIFIED",
+                                    "value": 0,
+                                    "description": "Simplified configuration block type"
+                                },
+                                {
+                                    "name": "FULL",
+                                    "value": 1,
+                                    "description": "Full configuration block type"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits16-19",
+                            "width": 4,
+                            "name": "instance",
+                            "access": "RW",
+                            "description": "XSPI instance: 0 - XSPI0, 1 - XSPI1",
+                            "values": [
+                                {
+                                    "name": "XSPI0",
+                                    "value": 0,
+                                    "description": "XSPI0"
+                                },
+                                {
+                                    "name": "XSPI1",
+                                    "value": 1,
+                                    "description": "XSPI1"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits20-23",
+                            "width": 4,
+                            "name": "memoryInterface",
+                            "access": "RW",
+                            "description": "Memory interface: 0 - XSPI",
+                            "values": [
+                                {
+                                    "name": "XSPI",
+                                    "value": 0,
+                                    "description": "XSPI memory interface"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits24-27",
+                            "width": 4,
+                            "name": "version",
+                            "access": "RO",
+                            "description": "Version, fixed value 0x0"
+                        },
+                        {
+                            "id": "field000-bits28-31",
+                            "width": 4,
+                            "name": "tag",
+                            "access": "RO",
+                            "description": "Tag, fixed value 0xC"
+                        }
+                    ]
+                }
+            ]
+        }
+    ]
+}

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/common/xmcd/xspi_ram_simplified.json

@@ -0,0 +1,310 @@
+{
+    "cpu": "General",
+    "groups": [
+        {
+            "group": {
+                "name": "General regs",
+                "description": "General register generated by SPSDK"
+            },
+            "registers": [
+                {
+                    "id": "field000",
+                    "offset_int": "0x0",
+                    "reg_width": 32,
+                    "name": "header",
+                    "description": "XMCD Header",
+                    "default_value_int": "0xc000000c",
+                    "bitfields": [
+                        {
+                            "id": "field000-bits0-11",
+                            "width": 12,
+                            "name": "configurationBlockSize",
+                            "access": "RW",
+                            "description": "Configuration block size including XMCD header itself"
+                        },
+                        {
+                            "id": "field000-bits12-15",
+                            "width": 4,
+                            "name": "configurationBlockType",
+                            "access": "RW",
+                            "description": "Configuration block type: 0 - Simplified, 1 - Full",
+                            "values": [
+                                {
+                                    "name": "SIMPLIFIED",
+                                    "value": 0,
+                                    "description": "Simplified configuration block type"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits16-19",
+                            "width": 4,
+                            "name": "instance",
+                            "access": "RW",
+                            "description": "XSPI instance: 0 - XSPI0, 1 - XSPI1",
+                            "values": [
+                                {
+                                    "name": "XSPI0",
+                                    "value": 0,
+                                    "description": "XSPI0"
+                                },
+                                {
+                                    "name": "XSPI1",
+                                    "value": 1,
+                                    "description": "XSPI1"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits20-23",
+                            "width": 4,
+                            "name": "memoryInterface",
+                            "access": "RW",
+                            "description": "Memory interface: 0 - XSPI",
+                            "values": [
+                                {
+                                    "name": "XSPI",
+                                    "value": 0,
+                                    "description": "XSPI memory interface"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field000-bits24-27",
+                            "width": 4,
+                            "name": "version",
+                            "access": "RO",
+                            "description": "Version, fixed value 0x0"
+                        },
+                        {
+                            "id": "field000-bits28-31",
+                            "width": 4,
+                            "name": "tag",
+                            "access": "RO",
+                            "description": "Tag, fixed value 0xC"
+                        }
+                    ]
+                }
+            ]
+        },
+        {
+            "group": {
+                "name": "General regs",
+                "description": "General register generated by SPSDK"
+            },
+            "registers": [
+                {
+                    "id": "field004",
+                    "offset_int": "0x4",
+                    "reg_width": 32,
+                    "name": "configOption0",
+                    "description": "XMCD Configuration Option 0",
+                    "default_value_int": "0xc1000700",
+                    "bitfields": [
+                        {
+                            "id": "field004-bits0-7",
+                            "width": 8,
+                            "name": "sizeInMB",
+                            "access": "RW",
+                            "description": "Size in MB: 0 - Auto detection, Others - Size in MB"
+                        },
+                        {
+                            "id": "field004-bits8-11",
+                            "width": 4,
+                            "name": "maximumFrequency",
+                            "access": "RW",
+                            "description": "Maximum frequency (SoC specific definitions)",
+                            "values": [
+                                {
+                                    "name": "MAX_FREQ_30_MHZ",
+                                    "value": 1,
+                                    "description": "Maximum 30MHz"
+                                },
+                                {
+                                    "name": "MAX_FREQ_50_MHZ",
+                                    "value": 2,
+                                    "description": "Maximum 50MHz"
+                                },
+                                {
+                                    "name": "MAX_FREQ_60_MHZ",
+                                    "value": 3,
+                                    "description": "Maximum 60MHz"
+                                },
+                                {
+                                    "name": "MAX_FREQ_80_MHZ",
+                                    "value": 4,
+                                    "description": "Maximum 80MHz"
+                                },
+                                {
+                                    "name": "MAX_FREQ_100_MHZ",
+                                    "value": 5,
+                                    "description": "Maximum 100MHz"
+                                },
+                                {
+                                    "name": "MAX_FREQ_120_MHZ",
+                                    "value": 6,
+                                    "description": "Maximum 120MHz"
+                                },
+                                {
+                                    "name": "MAX_FREQ_133_MHZ",
+                                    "value": 7,
+                                    "description": "Maximum 133MHz"
+                                },
+                                {
+                                    "name": "MAX_FREQ_166_MHZ",
+                                    "value": 8,
+                                    "description": "Maximum 166MHz"
+                                },
+                                {
+                                    "name": "MAX_FREQ_200_MHZ",
+                                    "value": 9,
+                                    "description": "Maximum 200MHz"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field004-bits12-15",
+                            "width": 4,
+                            "name": "misc",
+                            "access": "RW",
+                            "description": "Misc. For HyperRAM: 0 - Differential clock driven, 1 - Single-ended clock driven",
+                            "values": [
+                                {
+                                    "name": "DIFFERENTIAL_CLOCK",
+                                    "value": 0,
+                                    "description": "Differential clock driven"
+                                },
+                                {
+                                    "name": "SINGLE_ENDED_CLOCK",
+                                    "value": 1,
+                                    "description": "Single-ended clock driven"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 4
+                        },
+                        {
+                            "id": "field004-bits20-23",
+                            "width": 4,
+                            "name": "deviceType",
+                            "access": "RW",
+                            "description": "Device type: 0 - HyperRAM, 1 - APMemory",
+                            "values": [
+                                {
+                                    "name": "HYPER_RAM",
+                                    "value": 0,
+                                    "description": "HyperRAM"
+                                },
+                                {
+                                    "name": "AP_MEMORY",
+                                    "value": 1,
+                                    "description": "APMemory"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field004-bits24-27",
+                            "width": 4,
+                            "name": "optionSize",
+                            "access": "RW",
+                            "description": "Option Size",
+                            "values": [
+                                {
+                                    "name": "OPTION_SIZE_1",
+                                    "value": 0,
+                                    "description": "Option words = 1"
+                                },
+                                {
+                                    "name": "OPTION_SIZE_2",
+                                    "value": 1,
+                                    "description": "Option words = 2"
+                                }
+                            ]
+                        },
+                        {
+                            "id": "field004-bits28-31",
+                            "width": 4,
+                            "name": "tag",
+                            "access": "RO",
+                            "description": "Tag, fixed value 0xC"
+                        }
+                    ]
+                },
+                {
+                    "id": "field008",
+                    "offset_int": "0x8",
+                    "reg_width": 32,
+                    "name": "configOption1",
+                    "description": "XMCD Configuration Option 1",
+                    "default_value_int": "0x0",
+                    "bitfields": [
+                        {
+                            "id": "field008-bits0-3",
+                            "width": 4,
+                            "name": "readDummyCycles",
+                            "access": "RW",
+                            "description": "Read dummy cycles: 0 - Auto detection, Others - Specified dummy cycles"
+                        },
+                        {
+                            "id": "field008-bits4-7",
+                            "width": 4,
+                            "name": "writeDummyCycles",
+                            "access": "RW",
+                            "description": "Write dummy cycles: 0 - Auto detection, Others - Specified dummy cycles"
+                        },
+                        {
+                            "id": "field008-bits8-14",
+                            "width": 7,
+                            "name": "maxCsLowTime",
+                            "access": "RW",
+                            "description": "Maximum CS Low time - value x 0.1"
+                        },
+                        {
+                            "id": "field008-bit15",
+                            "width": 1,
+                            "name": "busWidth",
+                            "access": "RW",
+                            "description": "Bus width",
+                            "values": [
+                                {
+                                    "name": "BUS_WIDTH_X8",
+                                    "value": 0,
+                                    "description": "X8 mode"
+                                },
+                                {
+                                    "name": "BUS_WIDTH_X16",
+                                    "value": 1,
+                                    "description": "X16 mode"
+                                }
+                            ]
+                        },
+                        {
+                            "width": 4
+                        },
+                        {
+                            "width": 4
+                        },
+                        {
+                            "width": 4
+                        },
+                        {
+                            "id": "field008-bits28-31",
+                            "width": 4,
+                            "name": "ramConnection",
+                            "access": "RW",
+                            "description": "RAM connection configuration",
+                            "values": [
+                                {
+                                    "name": "CONNECTION_PORTA",
+                                    "value": 0,
+                                    "description": "RAM connection: 0 - PORTA"
+                                }
+                            ]
+                        }
+                    ]
+                }
+            ]
+        }
+    ]
+}

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/devices/k32w148/database.yaml

@@ -0,0 +1,28 @@
+# Copyright 2023-2025 NXP
+#
+# SPDX-License-Identifier: BSD-3-Clause
+
+alias: kw45b41z8
+
+revisions:
+  a0:
+    features:
+      pfr:
+        romcfg:
+          reg_spec: ifr_romcfg_a0.json
+  a1: 
+    features:
+      pfr:
+        romcfg:
+          reg_spec: ifr_romcfg_a1.json
+latest: a1
+
+# General MCU information
+info:
+  spsdk_predecessor_name: k32w1xx
+  # Web page of MCU representative
+  web: https://www.nxp.com/products/wireless/multiprotocol-mcus/tri-core-secure-and-ultra-low-power-mcu-for-matter-over-thread-and-bluetooth-le-5-3:K32W148
+
+  isp:
+    rom:
+      interfaces: ["uart", "spi", "i2c"]

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/devices/kw45b41z5/database.yaml

@@ -0,0 +1,36 @@
+# Copyright 2024-2025 NXP
+#
+# SPDX-License-Identifier: BSD-3-Clause
+
+alias: kw45b41z8
+
+# General MCU information
+info:
+  memory_map: # Memory map basic info
+    internal-flash_ns:
+      start_int: "0x0"
+      size_int: "0x80000"
+      external: false
+    flash-logical-window_ns:
+      start_int: "0x1000000"
+      size_int: "0x80000"
+      external: false
+      mirror_of: internal-flash_ns
+    internal-flash_s:
+      start_int: "0x10000000"
+      size_int: "0x80000"
+      external: false
+      mirror_of: internal-flash_ns
+    flash-logical-window_s:
+      start_int: "0x11000000"
+      size_int: "0x80000"
+      external: false
+      mirror_of: internal-flash_ns
+    system-tcm:
+      start_int: "0x20000000"
+      size_int: "0x1C000"
+      external: false
+    code-tcm:
+      start_int: "0x4000000"
+      size_int: "0x4000"
+      external: false

tools/production/dist/service-tui-v0.2.0-macos/service_tui/_internal/spsdk/data/devices/kw45b41z8/database.yaml

@@ -0,0 +1,211 @@
+# Copyright 2023-2025 NXP
+#
+# SPDX-License-Identifier: BSD-3-Clause
+
+revisions:
+  a0: {}    
+  a1: 
+    features:
+      pfr:
+        romcfg:
+          reg_spec: ifr_romcfg_a1.json        
+  a2:
+    features:
+      pfr:
+        romcfg:
+          reg_spec: ifr_romcfg_a2.json
+  
+latest: a2
+
+# General MCU information
+info:
+  purpose: Wireless Connectivity MCUs
+  spsdk_predecessor_name: kw45xx
+  # Web page of MCU representative
+  web: https://www.nxp.com/products/wireless/bluetooth-low-energy/32-bit-bluetooth-5-3-long-range-mcus-with-can-fd-and-lin-bus-options-arm-cortex-m33-core:KW45
+  memory_map: # Memory map basic info
+    internal-flash_ns:
+      start_int: "0x0"
+      size_int: "0x100000"
+      external: false
+    flash-logical-window_ns:
+      start_int: "0x1000000"
+      size_int: "0x100000"
+      external: false
+      mirror_of: internal-flash_ns
+    internal-flash_s:
+      start_int: "0x10000000"
+      size_int: "0x100000"
+      external: false
+      mirror_of: internal-flash_ns
+    flash-logical-window_s:
+      start_int: "0x11000000"
+      size_int: "0x100000"
+      external: false
+      mirror_of: internal-flash_ns
+    system-tcm:
+      start_int: "0x20000000"
+      size_int: "0x1C000"
+      external: false
+    code-tcm:
+      start_int: "0x4000000"
+      size_int: "0x4000"
+      external: false
+  isp:
+    rom:
+      protocol: mboot
+      interfaces: ["uart", "can", "spi", "i2c"]
+
+features:
+  # ======== Communication buffer section ========
+  comm_buffer:
+    address: 0x3000_4000
+    size: 0x1000
+
+  # ======== Fuses description section ========
+  fuses:
+    tool: blhost_legacy
+
+  # ======== Certificate block section ========
+  cert_block:
+    sub_features: [based_on_cert21]
+    rot_type: "cert_block_21"
+
+  # ======== Blhost section ========
+  blhost:
+    sub_features: [overridden_properties]
+    overridden_properties:
+       10: "verify-erase"
+       20: "boot-status"
+       21: "loadable-fw-version"
+       22: "fuse-program-voltage"
+
+  # ======== DAT section ========
+  dat:
+    sub_features: ["famode_cert"]
+    socc: 5 # SOCC identification
+    dmbox_ap_ix: 2 # Typical Index of debug mailbox access port is 2
+    dat_is_using_sha256_always: True
+    famode_cert: [famode, famode_nxp] # List of Fault analysis Mode certificates (names of MBI classes)
+    famode_cfg_defaults: # Dictionary of default values of standard MBI members for FAmode image
+      outputImageExecutionTarget: xip
+      inputImageFile: generated
+      outputImageExecutionAddress: 0
+      firmwareVersion: 0
+      enableTrustZone: false
+      trustZonePresetFile: null
+      manifestDigestHashAlgorithm: sha256
+      outputImageSubtype: main
+
+  # ======== MBI section ========
+  mbi:
+    mbi_classes:
+      plain_xip:
+        image_type: PLAIN_IMAGE
+        mixins:
+          - Mbi_MixinApp
+          - Mbi_MixinIvtZeroTotalLength
+          - Mbi_MixinLoadAddress
+          - Mbi_MixinTrustZoneMandatory
+          - Mbi_MixinImageSubType
+          - Mbi_ExportMixinAppTrustZone
+      crc_xip:
+        image_type: CRC_XIP_IMAGE
+        mixins:
+          - Mbi_MixinApp
+          - Mbi_MixinIvt
+          - Mbi_MixinLoadAddress
+          - Mbi_MixinTrustZoneMandatory
+          - Mbi_MixinImageSubType
+          - Mbi_ExportMixinAppTrustZone
+          - Mbi_ExportMixinCrcSign
+      signed_xip:
+        image_type: SIGNED_XIP_IMAGE
+        mixins:
+          - Mbi_MixinApp
+          - Mbi_MixinIvt
+          - Mbi_MixinLoadAddress
+          - Mbi_MixinCertBlockV21
+          - Mbi_MixinManifestDigest
+          - Mbi_ExportMixinAppCertBlockManifest
+          - Mbi_ExportMixinEccSign
+      famode:
+        image_type: SIGNED_XIP_IMAGE
+        mixins:
+          - Mbi_MixinApp
+          - Mbi_MixinIvt
+          - Mbi_MixinLoadAddress
+          - Mbi_MixinCertBlockV21
+          - Mbi_MixinManifest
+          - Mbi_ExportMixinAppCertBlockManifest
+          - Mbi_ExportMixinEccSign
+      famode_nxp:
+        image_type: SIGNED_XIP_IMAGE
+        mixins:
+          - Mbi_MixinApp
+          - Mbi_MixinIvt
+          - Mbi_MixinLoadAddress
+          - Mbi_MixinCertBlockV21
+          - Mbi_MixinManifest
+          - Mbi_MixinImageSubType
+          - Mbi_ExportMixinAppCertBlockManifest
+          - Mbi_ExportMixinEccSign
+      nxp_signed_xip:
+        image_type: SIGNED_XIP_NXP_IMAGE
+        mixins:
+          - Mbi_MixinApp
+          - Mbi_MixinIvt
+          - Mbi_MixinLoadAddress
+          - Mbi_MixinCertBlockV21
+          - Mbi_MixinManifestDigest
+          - Mbi_MixinImageSubType
+          - Mbi_ExportMixinAppCertBlockManifest
+          - Mbi_ExportMixinEccSign
+    images:
+      xip:
+        plain: plain_xip
+        crc: crc_xip
+        signed: signed_xip
+        nxp_signed: nxp_signed_xip
+
+  # ======== PFR section ========
+  pfr:
+    sub_features: [romcfg, cmactable]
+    romcfg:
+      address: 0x200_0000
+      reg_spec: ifr_romcfg_a0.json
+    cmactable:
+      address: 0x0200_4000
+      reg_spec: ifr_cmactable_a0.json
+  # ======== Secure binary v3.1 section ========
+  sb31:
+    supported_commands:
+      - erase
+      - load
+      - execute
+      - programFuses
+      - programIFR
+      - loadCMAC
+      - loadHashLocking
+      - fillMemory
+      - checkFwVersion
+
+  # ======== TrustZone section ========
+  tz:
+    reg_spec: tz.json
+
+  # ======== EL2GO TP section ========
+  el2go_tp:
+    el2go_name: KW
+    prov_method: fw_data_split
+    use_additional_data: true
+    fw_read_address: 0x3001_0000
+    ignored_otp_ranges: [31, 32]
+    validation_method: max_so_size=1024
+
+  # ======== Bootable image section ========
+  bootable_image:
+    mem_types:
+      internal:
+        segments:
+          mbi: 0x00