124 lines
3.8 KiB
C
124 lines
3.8 KiB
C
/*
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** ###################################################################
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** Processors: MIMXRT1052CVJ5B
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** MIMXRT1052CVL5B
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** MIMXRT1052DVJ6B
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** MIMXRT1052DVL6B
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**
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** Compilers: Freescale C/C++ for Embedded ARM
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** GNU C Compiler
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** IAR ANSI C/C++ Compiler for ARM
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** Keil ARM C/C++ Compiler
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** MCUXpresso Compiler
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**
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** Reference manual: IMXRT1050RM Rev.5, 07/2021 | IMXRT1050SRM Rev.2
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** Version: rev. 2.0, 2024-10-29
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** Build: b250520
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**
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** Abstract:
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** CMSIS Peripheral Access Layer for MIMXRT1052
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**
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** Copyright 1997-2016 Freescale Semiconductor, Inc.
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** Copyright 2016-2025 NXP
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** SPDX-License-Identifier: BSD-3-Clause
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**
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** http: www.nxp.com
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** mail: support@nxp.com
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**
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** Revisions:
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** - rev. 0.1 (2017-01-10)
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** Initial version.
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** - rev. 1.0 (2018-09-21)
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** Update interrupt vector table and dma request source.
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** Update register BEE_ADDR_OFFSET1's bitfield name to ADDR_OFFSET1.
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** Split GPIO_COMBINED_IRQS to GPIO_COMBINED_LOW_IRQS and GPIO_COMBINED_HIGH_IRQS.
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** - rev. 1.1 (2018-11-16)
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** Update header files to align with IMXRT1050RM Rev.1.
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** - rev. 1.2 (2018-11-27)
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** Update header files to align with IMXRT1050RM Rev.2.1.
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** - rev. 1.3 (2019-04-29)
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** Add SET/CLR/TOG register group to register CTRL, STAT, CHANNELCTRL, CH0STAT, CH0OPTS, CH1STAT, CH1OPTS, CH2STAT, CH2OPTS, CH3STAT, CH3OPTS of DCP module.
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** - rev. 1.4 (2021-08-10)
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** Update header files to align with IMXRT1050RM Rev.5.
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** - rev. 2.0 (2024-10-29)
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** Change the device header file from single flat file to multiple files based on peripherals,
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** each peripheral with dedicated header file located in periphN folder.
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**
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** ###################################################################
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*/
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/*!
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* @file MIMXRT1052.h
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* @version 2.0
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* @date 2024-10-29
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* @brief CMSIS Peripheral Access Layer for MIMXRT1052
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*
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* CMSIS Peripheral Access Layer for MIMXRT1052
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*/
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#if !defined(MIMXRT1052_H_) /* Check if memory map has not been already included */
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#define MIMXRT1052_H_
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/* IP Header Files List */
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#include "PERI_ADC.h"
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#include "PERI_ADC_ETC.h"
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#include "PERI_AIPSTZ.h"
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#include "PERI_AOI.h"
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#include "PERI_BEE.h"
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#include "PERI_CAN.h"
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#include "PERI_CCM.h"
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#include "PERI_CCM_ANALOG.h"
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#include "PERI_CM7_MCM.h"
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#include "PERI_CMP.h"
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#include "PERI_CSI.h"
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#include "PERI_CSU.h"
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#include "PERI_DCDC.h"
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#include "PERI_DCP.h"
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#include "PERI_DMA.h"
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#include "PERI_DMAMUX.h"
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#include "PERI_ENC.h"
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#include "PERI_ENET.h"
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#include "PERI_EWM.h"
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#include "PERI_FLEXIO.h"
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#include "PERI_FLEXRAM.h"
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#include "PERI_FLEXSPI.h"
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#include "PERI_GPC.h"
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#include "PERI_GPIO.h"
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#include "PERI_GPT.h"
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#include "PERI_I2S.h"
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#include "PERI_IOMUXC.h"
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#include "PERI_IOMUXC_GPR.h"
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#include "PERI_IOMUXC_SNVS.h"
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#include "PERI_IOMUXC_SNVS_GPR.h"
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#include "PERI_KPP.h"
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#include "PERI_LCDIF.h"
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#include "PERI_LPI2C.h"
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#include "PERI_LPSPI.h"
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#include "PERI_LPUART.h"
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#include "PERI_OCOTP.h"
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#include "PERI_PGC.h"
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#include "PERI_PIT.h"
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#include "PERI_PMU.h"
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#include "PERI_PWM.h"
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#include "PERI_PXP.h"
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#include "PERI_ROMC.h"
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#include "PERI_RTWDOG.h"
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#include "PERI_SEMC.h"
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#include "PERI_SNVS.h"
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#include "PERI_SPDIF.h"
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#include "PERI_SRC.h"
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#include "PERI_TEMPMON.h"
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#include "PERI_TMR.h"
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#include "PERI_TRNG.h"
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#include "PERI_TSC.h"
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#include "PERI_USB.h"
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#include "PERI_USBNC.h"
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#include "PERI_USBPHY.h"
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#include "PERI_USB_ANALOG.h"
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#include "PERI_USDHC.h"
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#include "PERI_WDOG.h"
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#include "PERI_XBARA.h"
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#include "PERI_XBARB.h"
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#include "PERI_XTALOSC24M.h"
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#endif /* #if !defined(MIMXRT1052_H_) */
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